+2015-11-16 Alan Lawrence <alan.lawrence@arm.com>
+
+ * gcc.target/aarch64/vclz.c: Correctly place INHIB_OPTIMIZATION.
+
2015-11-16 Christian Bruel <christian.bruel@st.com>
* lib/target-supports.exp (check_effective_target_arm_neon_ok_nocache):
CONCAT1 (vclz, POSTFIX (reg_len, data_len, is_signed))
#define RUN_TEST(test_set, answ_set, reg_len, data_len, is_signed, n) \
+ INHIB_OPTIMIZATION; \
a = LOAD_INST (reg_len, data_len, is_signed) (test_set); \
b = LOAD_INST (reg_len, data_len, is_signed) (answ_set); \
- INHIB_OPTIMIZATION; \
a = CLZ_INST (reg_len, data_len, is_signed) (a); \
for (i = 0; i < n; i++) \
- { \
- INHIB_OPTIMIZATION; \
- if (a [i] != b [i]) \
- { \
- return 1; \
- } \
- }
+ if (a [i] != b [i]) \
+ return 1;
int
test_vclz_s8 ()