* rw-vureg.{c,vuexpect}: test VU register read/writes through aliased memory

diff --git a/sim/testsuite/sky/.Sanitize b/sim/testsuite/sky/.Sanitize
index 55d87d54b6ed9aa01e8cb3db0d6bd20c1daa7ee4..7831a349abc96c6eb290dbd92ebee7bbcf28c1a5 100644 (file)
--- a/sim/testsuite/sky/.Sanitize
+++ b/sim/testsuite/sky/.Sanitize
@@ -215,6 +215,8 @@ t-cop2.vuexpect
 t-cop2b.c
 t-dma.c
 t-dma.dmaexpect
+rw-vureg.c
+rw-vureg.vuexpect
 t-pke2.trc
 t-pke2.vif1expect
 t-pke3.trc

diff --git a/sim/testsuite/sky/ChangeLog b/sim/testsuite/sky/ChangeLog
index c2896d1bc61b06430d66c2fec0a1f843c8443ee4..5a6ab79ca15ca49ec70c6533d6cd2dcf188aff84 100644 (file)
--- a/sim/testsuite/sky/ChangeLog
+++ b/sim/testsuite/sky/ChangeLog
@@ -1,3 +1,7 @@
+Wed Apr 29 8:44:31 1998  Ron Unrau  <runrau@cygnus.com>
+
+       * rw-vureg.c: test VU register read/writes through aliased memory
+
 Tue Apr 28 20:16:02 EDT 1998 Jillian Ye <jillian@cygnus.com>
 
        * sce*test*_out_gif.dat: change the last line of the files

diff --git a/sim/testsuite/sky/Makefile.in b/sim/testsuite/sky/Makefile.in
index 45ab8401f894f479dd670e85cf76b92abd4ef50e..ce60ccecda81b7eb9a3c1b6e83baca3c6b8dff71 100644 (file)
--- a/sim/testsuite/sky/Makefile.in
+++ b/sim/testsuite/sky/Makefile.in
@@ -118,7 +118,8 @@ TESTS = \
        tsv408_0.ok tsv408_1.ok \
        tsv416_0.ok tsv416_1.ok \
        tsv432_0.ok tsv432_1.ok \
-       t-cop2.vuok t-cop2b.ok
+       t-cop2.vuok t-cop2b.ok \
+       rw-vureg.ok
 
 #SCE_TESTS := $(patsubst %.dvpasm, %.ok, $(wildcard sce*.dvpasm))
 SCE_TESTS = \

diff --git a/sim/testsuite/sky/rw-vureg.c b/sim/testsuite/sky/rw-vureg.c
new file mode 100644 (file)
index 0000000..85bc9c1
--- /dev/null
+++ b/sim/testsuite/sky/rw-vureg.c
@@ -0,0 +1,155 @@
+#include <stdio.h>
+#include <string.h>
+
+extern void* memcpy( void*, const void*, size_t n );
+
+/* Register offsets within memory-mapped window */
+enum 
+{
+  VU_REG_VF    = 0,            /* Start of VF registers */
+  VU_REG_VI    = 0x200,        /* Start of VI registers */
+  VU_REG_MST   = 0x300,        /* Start of misc registers */
+  VU_REG_MMC   = 0x310,
+  VU_REG_MCP   = 0x320,
+  VU_REG_MR    = 0x330,
+  VU_REG_MI    = 0x340,
+  VU_REG_MQ    = 0x350,
+  VU_REG_MP    = 0x360,
+  VU_REG_MTPC  = 0x3a0,
+  VU_REG_STAT  = 0x3d0,        /* Start of special registers */
+  VU_REG_CIA   = 0x3e0,
+  VU_REG_END   = 0x3f0
+};
+
+#define VU0_REGISTER_WINDOW_START      0x10000C00
+#define VU1_REGISTER_WINDOW_START      0x11007000
+
+struct sreg {
+  short reg;
+  char filler[14];
+};
+
+struct wreg {
+  int reg;
+  char filler[12];
+};
+
+struct vuregs {
+  float f[32][4];
+  struct sreg i[16];
+  struct wreg m[16];
+} vu[2];
+
+struct vuregs buf;
+
+int main() {
+    volatile char *vu0, *vu1;
+    int i, j;
+    float f;
+    short s;
+    int v;
+    long long int lli;
+    int error = 0;
+
+    vu0 = (char *) VU0_REGISTER_WINDOW_START;
+    vu1 = (char *) VU1_REGISTER_WINDOW_START;
+
+   /* Write VU1 registers using friendly alignments and sizes (common case?).
+    * At the same time, initialize local (reference) copy of VU0 registers.
+    */
+    printf( "Initialize VU1 registers...\n" );
+    for( i=0; i<32; i++ )
+      for( j=0; j<4; j++ ) {
+       vu[0].f[i][j] = i + j/10.0;
+
+       vu[1].f[i][j] = 100.0 + i + j/10.0;
+       ((struct vuregs *) vu1)->f[i][j] = vu[1].f[i][j];
+      }
+       
+    for( i=0; i<16; i++ ) {
+      vu[0].i[i].reg = i;
+
+      vu[1].i[i].reg = 100 + i;
+      ((struct vuregs *) vu1)->i[i].reg = 100 + i;
+    }
+
+    for( i=0; i<12; i++ ) {
+      vu[0].m[i].reg = i;
+
+      vu[1].m[i].reg = 100 + i;
+      ((struct vuregs *) vu1)->m[i].reg = 100 + i;
+    }
+
+    /* Blast VU0 registers across using memcpy */
+    printf( "Initialize VU0 registers...\n" );
+    memcpy( vu0, &(vu[0]), VU_REG_END );
+
+    /* Check VU0 registers using friendly alignment and sizes */
+    printf( "Check VU0 initial register values...\n" );
+    for( i=0; i<32; i++ )
+      for( j=0; j<4; j++ ) {
+       f = ((struct vuregs *) vu0)->f[i][j];
+       if( f != vu[0].f[i][j] ) {
+         printf( "vu0_vf%02d%d: got %f (%x) != %f (%x)\n", i, j,
+                 f, *((int *) &f), vu[0].f[i][j], *((int *) &(vu[0].f[i][j])));
+         error++;
+       }
+      }
+       
+    for( i=0; i<16; i++ ) {
+      s = ((struct vuregs *) vu0)->i[i].reg;
+      if( s != vu[0].i[i].reg ) {
+       printf( "vu0_vi%02d: got %d (%x) != %d (%x)\n", i,
+               s, s, vu[0].i[i].reg, vu[0].i[i].reg );
+       error++;
+      }
+    }
+
+    for( i=0; i<7; i++ ) {
+      v = ((struct vuregs *) vu0)->m[i].reg;
+      if( v != vu[0].m[i].reg ) {
+       printf( "vu0_misc %2d: got %d (%x) != %d (%x)\n", i,
+               v, v, vu[0].m[i].reg, vu[0].m[i].reg );
+       error++;
+      }
+    }
+
+    /* Load buf from VU1 reg window a double word at a time */
+    for( i=0; i<VU_REG_END; i+=8 )
+      *((long long int *) (((char *) &buf) + i)) 
+       = *(( long long int *) (vu1 + i));
+
+    printf( "Check VU1 initial register values...\n" );
+    for( i=0; i<32; i++ )
+      for( j=0; j<4; j++ ) {
+       if( buf.f[i][j] != vu[1].f[i][j] ) {
+         printf( "vu1_vf%02d%d: got %f (%x) != %f (%x)\n", i, j,
+                 buf.f[i][j], *((int *) &(buf.f[i][j])), 
+                 vu[1].f[i][j], *((int *) &(vu[1].f[i][j])) );
+         error++;
+       }
+      }
+       
+    for( i=0; i<16; i++ ) {
+      if( buf.i[i].reg != vu[1].i[i].reg ) {
+       printf( "vu1_vi%02d: got %d (%x) != %d (%x)\n", i,
+               buf.i[i].reg, buf.i[i].reg, vu[1].i[i].reg, vu[1].i[i].reg );
+       error++;
+      }
+    }
+
+    for( i=0; i<7; i++ ) {
+      if( buf.m[i].reg != vu[1].m[i].reg ) {
+       printf( "vu1_misc %d: got %d (%x) != %d (%x)\n", i,
+               buf.m[i].reg, buf.m[i].reg, vu[1].m[i].reg, vu[1].m[i].reg );
+       error++;
+      }
+    }
+
+    if( error ) {
+      printf( "%d errors detected\n", error );
+      error = 1;
+    }
+
+    exit( error );
+}

diff --git a/sim/testsuite/sky/rw-vureg.vuexpect b/sim/testsuite/sky/rw-vureg.vuexpect
new file mode 100644 (file)
index 0000000..be39061
--- /dev/null
+++ b/sim/testsuite/sky/rw-vureg.vuexpect
@@ -0,0 +1,4 @@
+Initialize VU1 registers...
+Initialize VU0 registers...
+Check VU0 initial register values...
+Check VU1 initial register values...