Some fixes in handling of signed arrays
authorClifford Wolf <clifford@clifford.at>
Tue, 1 Nov 2016 22:17:43 +0000 (23:17 +0100)
committerClifford Wolf <clifford@clifford.at>
Tue, 1 Nov 2016 22:17:43 +0000 (23:17 +0100)
frontends/ast/genrtlil.cc
frontends/ast/simplify.cc

index 7c661e8f372aae0bfd31d2e5a02a2d5c730df3cd..db8d7409fa1324c3803171492dd86c1b365306ca 100644 (file)
@@ -1271,6 +1271,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
                        wire->attributes["\\src"] = stringf("%s:%d", filename.c_str(), linenum);
 
                        int mem_width, mem_size, addr_bits;
+                       is_signed = id2ast->is_signed;
                        id2ast->meminfo(mem_width, mem_size, addr_bits);
 
                        RTLIL::SigSpec addr_sig = children[0]->genRTLIL();
index d58b1c283667a7d707dcdd86a7c846c80c7090b4..9d5c75fedc2b4d31f2362d9f0a772ba84cac828b 100644 (file)
@@ -1510,6 +1510,7 @@ skip_dynamic_range_lvalue_expansion:;
                }
 
                int mem_width, mem_size, addr_bits;
+               bool mem_signed = children[0]->id2ast->is_signed;
                children[0]->id2ast->meminfo(mem_width, mem_size, addr_bits);
 
                int data_range_left = children[0]->id2ast->children[0]->range_left;
@@ -1529,6 +1530,7 @@ skip_dynamic_range_lvalue_expansion:;
 
                AstNode *wire_data = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(mem_width-1, true), mkconst_int(0, true)));
                wire_data->str = id_data;
+               wire_data->is_signed = mem_signed;
                current_ast_mod->children.push_back(wire_data);
                current_scope[wire_data->str] = wire_data;
                while (wire_data->simplify(true, false, false, 1, -1, false, false)) { }
@@ -2894,6 +2896,7 @@ bool AstNode::mem2reg_as_needed_pass2(pool<AstNode*> &mem2reg_set, AstNode *mod,
                std::string id_addr = sstr.str() + "_ADDR", id_data = sstr.str() + "_DATA";
 
                int mem_width, mem_size, addr_bits;
+               bool mem_signed = children[0]->id2ast->is_signed;
                children[0]->id2ast->meminfo(mem_width, mem_size, addr_bits);
 
                AstNode *wire_addr = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(addr_bits-1, true), mkconst_int(0, true)));
@@ -2906,6 +2909,7 @@ bool AstNode::mem2reg_as_needed_pass2(pool<AstNode*> &mem2reg_set, AstNode *mod,
                AstNode *wire_data = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(mem_width-1, true), mkconst_int(0, true)));
                wire_data->str = id_data;
                wire_data->is_reg = true;
+               wire_data->is_signed = mem_signed;
                wire_data->attributes["\\nosync"] = AstNode::mkconst_int(1, false);
                mod->children.push_back(wire_data);
                while (wire_data->simplify(true, false, false, 1, -1, false, false)) { }
@@ -2967,6 +2971,7 @@ bool AstNode::mem2reg_as_needed_pass2(pool<AstNode*> &mem2reg_set, AstNode *mod,
                        std::string id_addr = sstr.str() + "_ADDR", id_data = sstr.str() + "_DATA";
 
                        int mem_width, mem_size, addr_bits;
+                       bool mem_signed = id2ast->is_signed;
                        id2ast->meminfo(mem_width, mem_size, addr_bits);
 
                        AstNode *wire_addr = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(addr_bits-1, true), mkconst_int(0, true)));
@@ -2980,6 +2985,7 @@ bool AstNode::mem2reg_as_needed_pass2(pool<AstNode*> &mem2reg_set, AstNode *mod,
                        AstNode *wire_data = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(mem_width-1, true), mkconst_int(0, true)));
                        wire_data->str = id_data;
                        wire_data->is_reg = true;
+                       wire_data->is_signed = mem_signed;
                        if (block)
                                wire_data->attributes["\\nosync"] = AstNode::mkconst_int(1, false);
                        mod->children.push_back(wire_data);