2016-05-22 Jakub Jelinek <jakub@redhat.com>
+ * gcc.target/i386/avx512bw-kunpckdq-1.c (avx512bw_test): Use "m"
+ constraint instead of "r".
+ * gcc.target/i386/avx512f-additional-reg-names.c (foo): Use vpxord
+ insn instead of vxorpd.
+ * gcc.target/i386/strinline.c: Add dg-require-effective-target ia32.
+
* gcc.target/i386/avx512dq-vinsert-1.c: New test.
* gcc.target/i386/avx512vl-vinsert-1.c: New test.
avx512bw_test () {
__mmask64 k1, k2, k3;
volatile __m512i x;
+ long long one = 1, two = 2;
- __asm__( "kmovq %1, %0" : "=k" (k1) : "r" (1) );
- __asm__( "kmovq %1, %0" : "=k" (k2) : "r" (2) );
+ __asm__( "kmovq %1, %0" : "=k" (k1) : "m" (one) );
+ __asm__( "kmovq %1, %0" : "=k" (k2) : "m" (two) );
k3 = _mm512_kunpackd (k1, k2);
x = _mm512_mask_avg_epu8 (x, k3, x, x);
{
register int zmm_var asm ("zmm6") __attribute__((unused));
- __asm__ __volatile__("vxorpd %%zmm0, %%zmm0, %%zmm7\n" : : : "zmm7" );
+ __asm__ __volatile__("vpxord %%zmm0, %%zmm0, %%zmm7\n" : : : "zmm7" );
}
/* { dg-do compile } */
/* { dg-require-effective-target fpic } */
+/* { dg-require-effective-target ia32 } */
/* { dg-options "-O2 -fPIC" } */
typedef unsigned int size_t;
char *
register char *__tmp = __dest;
register unsigned long int __d0, __d1;
__asm__ __volatile__
- ("shrl $1,%3\n\t"
+ (
+ "shrl $1,%3\n\t"
"jz 2f\n"
"1:\n\t"
"movl (%2),%0\n\t"