i965: Bump generation check in code to disable HiZ at LODs > 0.

Broadwell's "HiZ Resolve" operation still has the restriction that the
rectangle primitive must be 8x4 aligned.  So I believe we still need
this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 2198b8eab966b1453e58df4ed2475a21ad1f38d2..8e0d2beff866634192cea0b4a763e20167343e93 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1237,7 +1237,7 @@ intel_miptree_slice_enable_hiz(struct brw_context *brw,
 {
    assert(mt->hiz_mt);
 
-   if (brw->is_haswell) {
+   if (brw->gen >= 8 || brw->is_haswell) {
       uint32_t width = minify(mt->physical_width0, level);
       uint32_t height = minify(mt->physical_height0, level);