Add a shader cap for specifying the preferred shader representation.
Right now the only supported value is TGSI, other enum values will be
added as they are needed.
This is mainly to accommodate AMD's LLVM compiler back-end by letting
it bypass the TGSI representation for compute programs. Other drivers
will keep using the common TGSI instruction set.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
If unsupported, only float opcodes are supported.
* ``PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS``: THe maximum number of texture
samplers.
+* ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the
+ program. It should be one of the ``pipe_shader_ir`` enum values.
.. _pipe_compute_cap:
PIPE_SHADER_CAP_INDIRECT_CONST_ADDR = 15,
PIPE_SHADER_CAP_SUBROUTINES = 16, /* BGNSUB, ENDSUB, CAL, RET */
PIPE_SHADER_CAP_INTEGERS = 17,
- PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS = 18
+ PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS = 18,
+ PIPE_SHADER_CAP_PREFERRED_IR = 19
+};
+
+/**
+ * Shader intermediate representation.
+ */
+enum pipe_shader_ir
+{
+ PIPE_SHADER_IR_TGSI
};
/**
struct pipe_compute_state
{
- const struct tgsi_token *tokens; /**< Compute program to be executed. */
+ const void *prog; /**< Compute program to be executed. */
unsigned req_local_mem; /**< Required size of the LOCAL resource. */
unsigned req_private_mem; /**< Required size of the PRIVATE resource. */
unsigned req_input_mem; /**< Required size of the INPUT resource. */