(no commit message)

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index 955955a6b4693d9b2c1d86b3b0cee3fac68dd7d0..ad1740f0fb9078984e909a3b30b659dd1e63ee5d 100644 (file)
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -400,16 +400,16 @@ are all set as normal for any GPR instructions that overflow.
 
 * `fcvttgw RT, FRA, Mode`
   Convert from 64-bit float to 32-bit signed integer, writing the result
-  to the GPR `RT`. Converts using [mode `Mode`]
+  to the GPR `RT`. Converts using [mode `Mode`]. Similar to `fctiw` or `fctiwz`
 * `fcvttguw RT, FRA, Mode`
   Convert from 64-bit float to 32-bit unsigned integer, writing the result
-  to the GPR `RT`. Converts using [mode `Mode`]
+  to the GPR `RT`. Converts using [mode `Mode`]. Similar to `fctiwu` or `fctiwuz`
 * `fcvttgd RT, FRA, Mode`
   Convert from 64-bit float to 64-bit signed integer, writing the result
-  to the GPR `RT`. Converts using [mode `Mode`]
+  to the GPR `RT`. Converts using [mode `Mode`]. Similar to `fctid` or `fctidz`
 * `fcvttgud RT, FRA, Mode`
   Convert from 64-bit float to 64-bit unsigned integer, writing the result
-  to the GPR `RT`. Converts using [mode `Mode`]
+  to the GPR `RT`. Converts using [mode `Mode`]. Similar to `fctidu` or `fctiduz`
 * `fcvtstgw RT, FRA, Mode`
   Convert from 32-bit float to 32-bit signed integer, writing the result
   to the GPR `RT`. Converts using [mode `Mode`]