struct radv_shader_info {
bool loads_push_constants;
+ uint8_t min_push_constant_used;
+ uint8_t max_push_constant_used;
+ bool has_only_32bit_push_constants;
+ bool has_indirect_push_constants;
uint32_t desc_set_used_mask;
bool needs_multiview_view_index;
bool uses_invocation_id;
}
}
+static void
+gather_push_constant_info(const nir_shader *nir,
+ const nir_intrinsic_instr *instr,
+ struct radv_shader_info *info)
+{
+ nir_const_value *cval = nir_src_as_const_value(instr->src[0]);
+ int base = nir_intrinsic_base(instr);
+ int range = nir_intrinsic_range(instr);
+
+ if (!cval) {
+ info->has_indirect_push_constants = true;
+ } else {
+ uint32_t min = base + cval->u32[0];
+ uint32_t max = min + instr->num_components * 4;
+
+ info->max_push_constant_used =
+ MAX2(max, info->max_push_constant_used);
+ info->min_push_constant_used =
+ MIN2(min, info->min_push_constant_used);
+ }
+
+ if (instr->dest.ssa.bit_size != 32)
+ info->has_only_32bit_push_constants = false;
+
+ info->loads_push_constants = true;
+}
+
static void
gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
struct radv_shader_info *info)
info->uses_prim_id = true;
break;
case nir_intrinsic_load_push_constant:
- info->loads_push_constants = true;
+ gather_push_constant_info(nir, instr, info);
break;
case nir_intrinsic_vulkan_resource_index:
info->desc_set_used_mask |= (1 << nir_intrinsic_desc_set(instr));
ralloc_free(xfb);
}
+void
+radv_nir_shader_info_init(struct radv_shader_info *info)
+{
+ /* Assume that shaders only have 32-bit push constants by default. */
+ info->min_push_constant_used = UINT8_MAX;
+ info->has_only_32bit_push_constants = true;
+}
+
void
radv_nir_shader_info_pass(const struct nir_shader *nir,
const struct radv_nir_compiler_options *options,