shamt.remove(GetSize(shamt)-1);
} while (shamt[GetSize(shamt)-1] == State::S0);
} else
- if (param(shift, \B_SIGNED).as_bool()) {
+ if (shift->type.in($shift, $shiftx) && param(shift, \B_SIGNED).as_bool()) {
reject;
}
+ if (GetSize(shamt) > 20)
+ reject;
endcode
match mul
code
IdString const_factor_port = port(mul, \A).is_fully_const() ? \A : \B;
- int const_factor = port(mul, const_factor_port).as_int();
+ IdString const_factor_signed = const_factor_port == \A ? \A_SIGNED : \B_SIGNED;
+ Const const_factor_cnst = port(mul, const_factor_port).as_const();
+ int const_factor = const_factor_cnst.as_int();
+
+ if (GetSize(const_factor_cnst) == 0)
+ reject;
+
+ if (const_factor_cnst.bits[GetSize(const_factor_cnst)-1] != State::S0 &&
+ param(mul, const_factor_signed).as_bool())
+ reject;
+
+ if (GetSize(const_factor_cnst) > 20)
+ reject;
+
if (GetSize(port(shift, \Y)) > const_factor)
reject;
- log_dump(shift, shamt, mul, const_factor);
+
+ log("shiftmul pattern in %s: shift=%s, mul=%s\n", log_id(module), log_id(shift), log_id(mul));
+
+ int new_const_factor_log2 = ceil_log2(const_factor);
+ int new_const_factor = 1 << new_const_factor_log2;
+
+ SigSpec padding(State::Sx, new_const_factor-const_factor);
+ SigSpec old_a = port(shift, \A), new_a;
+ int trunc = 0;
+
+ if (GetSize(old_a) % const_factor != 0) {
+ trunc = const_factor - GetSize(old_a) % const_factor;
+ old_a.append(SigSpec(State::Sx, trunc));
+ }
+
+ for (int i = 0; i*const_factor < GetSize(old_a); i++) {
+ SigSpec slice = old_a.extract(i*const_factor, const_factor);
+ new_a.append(slice);
+ new_a.append(padding);
+ }
+
+ if (trunc > 0)
+ new_a.remove(GetSize(new_a)-trunc, trunc);
+
+ SigSpec new_b = {port(mul, const_factor_port == \A ? \B : \A), SigSpec(State::S0, new_const_factor_log2)};
+ if (param(shift, \B_SIGNED).as_bool())
+ new_b.append(State::S0);
+
+ shift->setPort(\A, new_a);
+ shift->setParam(\A_WIDTH, GetSize(new_a));
+ shift->setPort(\B, new_b);
+ shift->setParam(\B_WIDTH, GetSize(new_b));
+
+ blacklist(shift);
reject;
endcode