-# NLnet Binutils for SVP64 ISA Expansion Project Grant
+# NLnet Binutils for Simple-V ISA Expansion Project Grant
Code: 2023-12-XXX
## Abstract: Can you explain the whole project and its expected outcome(s).
-This project is a collaboration between RED Semiconductor and LibreSOC to create binutil tools that support the development of Simple-V and SVP64 capabilities for the open-source RISC-V ISA. It will directly support the ISA Expansion project for which a separate grant application has been made, and will build on learnings from binutils developed for POWER ISA. The outcome of the project will be the completion of binutil tools capable of creating and managing binary program files, including handling object files, libraries, profile data, and assembly source code.
-
-The completed tools will be made available to developers via LibreSOC's website and git repositories.
+This project is to enhance binutils tools to support Simple-V capabilities for the RISC-V ISA. It will directly support the ISA Expansion project
+<https://libre-soc.org/nlnet_2023_simplev_riscv>
+for which a separate grant application has been made, and will build on learnings from
+binutils developed for POWER ISA. The outcome of the project will be the completion of binutil tools capable of creating and managing binary program files, including handling object files, libraries, profile data, and assembly source code.
# Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions?