sim: Call regStats of base-class as well
authorStephan Diestelhorst <stephan.diestelhorst@arm.com>
Mon, 6 Jun 2016 16:16:43 +0000 (17:16 +0100)
committerStephan Diestelhorst <stephan.diestelhorst@arm.com>
Mon, 6 Jun 2016 16:16:43 +0000 (17:16 +0100)
We want to extend the stats of objects hierarchically and thus it is necessary
to register the statistics of the base-class(es), as well.  For now, these are
empty, but generic stats will be added there.

Patch originally provided by Akash Bagdia at ARM Ltd.

15 files changed:
src/arch/arm/table_walker.cc
src/arch/arm/tlb.cc
src/cpu/base.cc
src/cpu/testers/traffic_gen/traffic_gen.cc
src/dev/net/etherdevice.cc
src/dev/pci/copy_engine.cc
src/dev/storage/ide_disk.cc
src/mem/abstract_mem.cc
src/mem/cache/base.cc
src/mem/cache/prefetch/base.cc
src/mem/cache/tags/base.cc
src/mem/comm_monitor.cc
src/mem/xbar.cc
src/sim/process.cc
src/sim/system.cc

index 82bec2547c05d159812ec614b3cfe8d52865450f..91b13e25106ca789af96da3f7c5bf1dd0c20d5ac 100644 (file)
@@ -2122,6 +2122,8 @@ TableWalker::pageSizeNtoStatBin(uint8_t N)
 void
 TableWalker::regStats()
 {
+    ClockedObject::regStats();
+
     statWalks
         .name(name() + ".walks")
         .desc("Table walker walks requested")
index db132e2d686456fb56c55f3ed367a3b4545fb887..f4d51546c8d97bff7f735cffbdfa09e1900ad5d0 100644 (file)
@@ -417,6 +417,7 @@ TLB::unserialize(CheckpointIn &cp)
 void
 TLB::regStats()
 {
+    BaseTLB::regStats();
     instHits
         .name(name() + ".inst_hits")
         .desc("ITB inst hits")
index 624843f425e55c46cab3433373ddf803119cce35..fbd8af99abbb5e1a5b351cbbde74686c2451caaf 100644 (file)
@@ -397,6 +397,8 @@ BaseCPU::probeInstCommit(const StaticInstPtr &inst)
 void
 BaseCPU::regStats()
 {
+    MemObject::regStats();
+
     using namespace Stats;
 
     numCycles
index fbb26baa8891ce3e175b168c44a58210064c4dee..af19767844dedddaf9926fcb6f1a99d8f152aee4 100644 (file)
@@ -526,6 +526,8 @@ TrafficGen::noProgress()
 void
 TrafficGen::regStats()
 {
+    ClockedObject::regStats();
+
     // Initialise all the stats
     using namespace Stats;
 
index 59849502ccd45c4ec63de5172843839a0a4b08b2..aeaedf7956f697c7f43bf1b6b650230fcdb42c77 100644 (file)
@@ -36,6 +36,8 @@
 void
 EtherDevice::regStats()
 {
+    PciDevice::regStats();
+
     txBytes
         .name(name() + ".txBytes")
         .desc("Bytes Transmitted")
index fba96a11042d457ce14060efea5d4cb10c17ebdf..326c51d117dedfbfc5b9ebf08a673f872100cd69 100644 (file)
@@ -425,6 +425,8 @@ CopyEngine::CopyEngineChannel::channelWrite(Packet *pkt, Addr daddr, int size)
 void
 CopyEngine::regStats()
 {
+    PciDevice::regStats();
+
     using namespace Stats;
     bytesCopied
         .init(regs.chanCount)
index 4eefdbbd7273897cc336845e45239d25a4f26cc9..e4b4e625a68617fc60a09243f5ab38395dbb5f7a 100644 (file)
@@ -392,6 +392,8 @@ IdeDisk::doDmaDataRead()
 void
 IdeDisk::regStats()
 {
+    SimObject::regStats();
+
     using namespace Stats;
     dmaReadFullPages
         .name(name() + ".dma_read_full_pages")
index cbe3607799b6cd55152283a3aa9002809363e2ce..04e4b00574f6b8878655629049a458ed55ba4d0d 100644 (file)
@@ -79,6 +79,8 @@ AbstractMemory::setBackingStore(uint8_t* pmem_addr)
 void
 AbstractMemory::regStats()
 {
+    MemObject::regStats();
+
     using namespace Stats;
 
     assert(system());
index b6b3b1481c71ae6b1485ebc65fabcf0151dc557b..814159fc9fa418704a7bee8729074f40641142ab 100644 (file)
@@ -176,6 +176,8 @@ BaseCache::inRange(Addr addr) const
 void
 BaseCache::regStats()
 {
+    MemObject::regStats();
+
     using namespace Stats;
 
     // Hit statistics
index 0b296144c36e56cf25f0a8a340bbfd207ed2386c..3d22dcce68f0a86b53898a3b5edea7940f796c38 100644 (file)
@@ -74,6 +74,8 @@ BasePrefetcher::setCache(BaseCache *_cache)
 void
 BasePrefetcher::regStats()
 {
+    ClockedObject::regStats();
+
     pfIssued
         .name(name() + ".num_hwpf_issued")
         .desc("number of hwpf issued")
index c413fbc5dc287dfc6f09a8842f28042d185f1f9f..6a926c0d8a86e176ed10d78af7bd76d08a8dd9ec 100644 (file)
@@ -71,7 +71,10 @@ BaseTags::setCache(BaseCache *_cache)
 void
 BaseTags::regStats()
 {
+    ClockedObject::regStats();
+
     using namespace Stats;
+
     replacements
         .init(maxThreadsPerCPU)
         .name(name() + ".replacements")
index 6077d2951170edc13331475f1abca77899f0fa4b..05549fd1cf94502fb6864404858b753441c5f9d8 100644 (file)
@@ -384,6 +384,8 @@ CommMonitor::recvRangeChange()
 void
 CommMonitor::regStats()
 {
+    MemObject::regStats();
+
     // Initialise all the monitor stats
     using namespace Stats;
 
index 7316fbc216e075aa03eef3294f8aaee3b2257f00..416b0293145c03be7bdead78d33bc7d283f79982 100644 (file)
@@ -541,6 +541,8 @@ BaseXBar::getAddrRanges() const
 void
 BaseXBar::regStats()
 {
+    ClockedObject::regStats();
+
     using namespace Stats;
 
     transDist
index d0dd3d92b71ca4f13f918bb75f5905acfd093d23..7c64dad2244bee2f9fa823aa06bc41ee6e4d4d86 100644 (file)
@@ -191,6 +191,8 @@ Process::Process(ProcessParams * params)
 void
 Process::regStats()
 {
+    SimObject::regStats();
+
     using namespace Stats;
 
     num_syscalls
index 3f7ea928618858fd28c2ca92bbaf5898e2a7e973..9f240c9bcbb57c14c2303d14683c4039415b4f0d 100644 (file)
@@ -393,6 +393,8 @@ System::unserialize(CheckpointIn &cp)
 void
 System::regStats()
 {
+    MemObject::regStats();
+
     for (uint32_t j = 0; j < numWorkIds ; j++) {
         workItemStats[j] = new Stats::Histogram();
         stringstream namestr;