Add some spacing

diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v
index 82399be0835c289fea2c595d7192cd26bb0ffd65..2eb9fa2c1bdda20f054c531bc0592d1764793d5c 100644 (file)
--- a/techlibs/xilinx/cells_map.v
+++ b/techlibs/xilinx/cells_map.v
@@ -220,15 +220,15 @@ module \$__XILINX_SHIFTX (A, B, Y);
     // This has the effect of more effectively utilising the hard mux;
     // take for example a 5:1 multiplexer, currently this would map as:
     //
-    // A[0] \___  __                       A[0] \__  __
-    // A[4] /   \|  \     whereas the more A[1] /  \|  \
-    // A[1] _____|   |    obvious mapping  A[2] \___|   |
-    // A[2] _____|   |--  of MSBs to hard  A[3] /   |   |__
-    // A[3]______|   |    resources would  A[4] ____|   |
-    //           |__/     lead to:         1'bx ____|   |
-    //            ||                                |__/
-    //            ||                                 ||
-    //          B[1:0]                             B[1:2]
+    //     A[0] \___  __                             A[0] \__  __
+    //     A[4] /   \|  \       whereas the more     A[1] /  \|  \
+    //     A[1] _____|   |      obvious mapping      A[2] \___|   |
+    //     A[2] _____|   |--    of MSBs to hard      A[3] /   |   |__
+    //     A[3]______|   |      resources would      A[4] ____|   |
+    //               |__/       lead to:             1'bx ____|   |
+    //                ||                                      |__/
+    //                ||                                       ||
+    //              B[1:0]                                   B[1:2]
     //
     // Expectation would be that the 'forward' mapping (right) is more
     // area efficient (consider a 9:1 multiplexer using 2x4:1 multiplexers