radeonsi: de-atomize L2 prefetch

I'd like to be able to move the prefetch call site around.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index e42f260edb0ed60c752c11d3ab13169add456cf6..9f0e506282b7bcd1ab04e41195daa5eb14201b3f 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -450,7 +450,7 @@ static void cik_prefetch_shader_async(struct si_context *sctx,
        }
 }
 
-static void cik_emit_prefetch_L2(struct si_context *sctx, struct r600_atom *atom)
+void cik_emit_prefetch_L2(struct si_context *sctx)
 {
        /* Prefetch shaders and VBO descriptors to TC L2. */
        if (si_pm4_state_changed(sctx, ls))
@@ -473,12 +473,11 @@ static void cik_emit_prefetch_L2(struct si_context *sctx, struct r600_atom *atom
        }
        if (si_pm4_state_changed(sctx, ps))
                cik_prefetch_shader_async(sctx, sctx->queued.named.ps);
+
+       sctx->prefetch_L2 = false;
 }
 
 void si_init_cp_dma_functions(struct si_context *sctx)
 {
        sctx->b.clear_buffer = si_clear_buffer;
-
-       si_init_atom(sctx, &sctx->prefetch_L2, &sctx->atoms.s.prefetch_L2,
-                    cik_emit_prefetch_L2);
 }

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index ea5b89e3ad6c7de34c966b2f3219f56f8a649e03..917b0e1a529e8638384316d0c4919039bab38f75 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -1177,7 +1177,7 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
         * cache is needed. */
        si_mark_atom_dirty(sctx, &sctx->shader_userdata.atom);
        if (sctx->b.chip_class >= CIK)
-               si_mark_atom_dirty(sctx, &sctx->prefetch_L2);
+               sctx->prefetch_L2 = true;
        sctx->vertex_buffers_dirty = false;
        sctx->vertex_buffer_pointer_dirty = true;
        return true;

diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index f2dfcc7cc5e30a882a3750b8c368c0dfe66ed431..756b15968d979abee669916b285f3c6a03ace3fc 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -217,7 +217,7 @@ void si_begin_new_cs(struct si_context *ctx)
                si_ce_restore_all_descriptors_at_ib_start(ctx);
 
        if (ctx->b.chip_class >= CIK)
-               si_mark_atom_dirty(ctx, &ctx->prefetch_L2);
+               ctx->prefetch_L2 = true;
 
        /* CLEAR_STATE disables all colorbuffers, so only enable bound ones. */
        ctx->framebuffer.dirty_cbufs =

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 19842999072f3d9bd79f05437c5a8061cce2079d..d21388649a1635f552811cb095def55ddbed109d 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -283,6 +283,7 @@ struct si_context {
 
        bool                            gfx_flush_in_progress:1;
        bool                            compute_is_busy:1;
+       bool                            prefetch_L2:1;
 
        /* Atoms (direct states). */
        union si_state_atoms            atoms;
@@ -293,7 +294,6 @@ struct si_context {
        union si_state                  emitted;
 
        /* Atom declarations. */
-       struct r600_atom                prefetch_L2;
        struct si_framebuffer           framebuffer;
        struct si_sample_locs           msaa_sample_locs;
        struct r600_atom                db_render_state;
@@ -484,6 +484,7 @@ void si_copy_buffer(struct si_context *sctx,
                    unsigned user_flags);
 void cik_prefetch_TC_L2_async(struct si_context *sctx, struct pipe_resource *buf,
                              uint64_t offset, unsigned size);
+void cik_emit_prefetch_L2(struct si_context *sctx);
 void si_init_cp_dma_functions(struct si_context *sctx);
 
 /* si_debug.c */

diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index acc8fb7870a6b5c6591f383faaf14cb9b26666c8..9fbede702a7a5059fe706d4a9a416d1ebb06c962 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -141,7 +141,6 @@ union si_state {
 union si_state_atoms {
        struct {
                /* The order matters. */
-               struct r600_atom *prefetch_L2;
                struct r600_atom *render_cond;
                struct r600_atom *streamout_begin;
                struct r600_atom *streamout_enable; /* must be after streamout_begin */

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 52546451bc799ffed0bf59805c93771b86e750c4..3f933fec2dcb876f531bf4e891d1dbffa6ac9ce1 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -1346,6 +1346,9 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
        if (sctx->b.flags)
                si_emit_cache_flush(sctx);
 
+       if (sctx->prefetch_L2)
+               cik_emit_prefetch_L2(sctx);
+
        /* Emit state atoms. */
        mask = sctx->dirty_atoms;
        while (mask) {

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index daf4af5b28bd76e1600aabad8d0a4ae07b74c6ce..0dd64025d482de2a42c0b032600f22f74b905bf2 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -3308,7 +3308,7 @@ bool si_update_shaders(struct si_context *sctx)
        }
 
        if (sctx->b.chip_class >= CIK)
-               si_mark_atom_dirty(sctx, &sctx->prefetch_L2);
+               sctx->prefetch_L2 = true;
 
        sctx->do_update_shaders = false;
        return true;