greenpak4: Fixed typo
authorAndrew Zonenberg <azonenberg@drawersteak.com>
Wed, 14 Dec 2016 23:15:38 +0000 (07:15 +0800)
committerAndrew Zonenberg <azonenberg@drawersteak.com>
Wed, 14 Dec 2016 23:15:38 +0000 (07:15 +0800)
techlibs/greenpak4/cells_sim.v

index 83727e9b2e7d58b1973e8d1b34c3338607b09d5d..d5a06a453858de90ea120c7d76fe2558e6ad0185 100644 (file)
@@ -132,7 +132,7 @@ module GP_DAC(input[7:0] DIN, input wire VREF, output reg VOUT);
 
 endmodule
 
-module GP_DCMPREF(output OUT)
+module GP_DCMPREF(output OUT);
        parameter[7:0] REF_VAL = 8'h00;
        wire[7:0] OUT = REF_VAL;
 endmodule