Update comment
authorEddie Hung <eddie@fpgeh.com>
Wed, 17 Jul 2019 20:26:17 +0000 (13:26 -0700)
committerEddie Hung <eddie@fpgeh.com>
Wed, 17 Jul 2019 20:26:17 +0000 (13:26 -0700)
techlibs/xilinx/synth_xilinx.cc

index bfce922dbe65289704697564938193ed19d4cd8a..2e2fbbd9d2b988540d67379ed0daeaaf193074d9 100644 (file)
@@ -284,12 +284,10 @@ struct SynthXilinxPass : public ScriptPass
 
                        run("techmap -map +/cmp2lut.v -D LUT_WIDTH=6");
 
-                       // The actual behaviour of the Xilinx DSP is a signed 25x18 multiply
-                       // Due to current limitations of mul2dsp, we are actually mapping as a 24x17
-                       // unsigned multiply with MSBs set to 1'b0
-
-                       if (!nodsp || help_mode)
+                       if (!nodsp || help_mode) {
+                               // NB: Xilinx multipliers are signed only
                                run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=25 -D DSP_A_SIGNEDONLY=1 -D DSP_B_MAXWIDTH=18 -D DSP_B_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18");
+                       }
 
                        run("alumacc");
                        run("share");