return 2;
case FS_OPCODE_TEX:
case FS_OPCODE_TXB:
+ case FS_OPCODE_TXD:
case FS_OPCODE_TXL:
return 1;
case FS_OPCODE_FB_WRITE:
}
/* gen4's SIMD8 sampler always has the slots for u,v,r present. */
mlen += 3;
+ } else if (ir->op == ir_txd) {
+ assert(!"TXD isn't supported on gen4 yet.");
} else {
/* Oh joy. gen4 doesn't have SIMD8 non-shadow-compare bias/lod
* instructions. We'll need to do SIMD16 here.
inst = emit(fs_inst(FS_OPCODE_TXL, dst));
break;
case ir_txd:
+ inst = emit(fs_inst(FS_OPCODE_TXD, dst));
+ break;
case ir_txf:
assert(!"GLSL 1.30 features unsupported");
break;
msg_type = BRW_SAMPLER_MESSAGE_SAMPLE_LOD_GEN5;
}
break;
+ case FS_OPCODE_TXD:
+ assert(!"TXD isn't supported on gen5+ yet.");
+ break;
}
} else {
switch (inst->opcode) {
simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16;
}
break;
+ case FS_OPCODE_TXD:
+ assert(!"TXD isn't supported on gen4 yet.");
+ break;
}
}
assert(msg_type != -1);
break;
case FS_OPCODE_TEX:
case FS_OPCODE_TXB:
+ case FS_OPCODE_TXD:
case FS_OPCODE_TXL:
generate_tex(inst, dst, src[0]);
break;
FS_OPCODE_LINTERP,
FS_OPCODE_TEX,
FS_OPCODE_TXB,
+ FS_OPCODE_TXD,
FS_OPCODE_TXL,
FS_OPCODE_DISCARD_NOT,
FS_OPCODE_DISCARD_AND,
{
return (opcode == FS_OPCODE_TEX ||
opcode == FS_OPCODE_TXB ||
+ opcode == FS_OPCODE_TXD ||
opcode == FS_OPCODE_TXL);
}