i965: fix some FBO depth/stencil assertions

diff --git a/src/mesa/drivers/dri/intel/intel_depthstencil.c b/src/mesa/drivers/dri/intel/intel_depthstencil.c
index c2b4d7728b41f09a8a85e6899942e31d720d4868..f43b9aed4868bf22aebde7411aa461b505ecfe3e 100644 (file)
--- a/src/mesa/drivers/dri/intel/intel_depthstencil.c
+++ b/src/mesa/drivers/dri/intel/intel_depthstencil.c
@@ -177,8 +177,11 @@ intel_validate_paired_depth_stencil(GLcontext * ctx,
       }
       else {
          /* Separate depth/stencil buffers, need to interleave now */
-         ASSERT(depthRb->Base._BaseFormat == GL_DEPTH_COMPONENT);
-         ASSERT(stencilRb->Base._BaseFormat == GL_STENCIL_INDEX);
+         ASSERT(depthRb->Base._BaseFormat == GL_DEPTH_COMPONENT ||
+                depthRb->Base._BaseFormat == GL_DEPTH_STENCIL);
+         ASSERT(stencilRb->Base._BaseFormat == GL_STENCIL_INDEX ||
+                stencilRb->Base._BaseFormat == GL_DEPTH_STENCIL);
+
          /* may need to interleave depth/stencil now */
          if (depthRb->PairedStencil == stencilRb->Base.Name) {
             /* OK, the depth and stencil buffers are already interleaved */