+2002-12-27 Chris Demetriou <cgd@broadcom.com>
+
+ * gas/mips/mips.exp: Define the notion of an "architecture data
+ array," add comments indicating how to add a new architecture and
+ suggestions for adding new tests. Populate the architecture data
+ array with many known architectures and convert many tests to
+ be run for multiple architectures.
+ (mips_arches): New global array.
+ (mips_arch_create, mips_arch_list_all, mips_arch_data)
+ (mips_arch_displayname, mips_arch_properties)
+ (mips_arch_as_flags, mips_arch_objdump_flags, mips_arch_matches)
+ (mips_arch_list_matching): New functions to operate on mips_arches.
+ (run_dump_test_arch, run_dump_test_arches, run_list_test_arch)
+ (run_list_test_arches): New functions.
+ (run_list_test): Document and add an optional "test name" argument.
+ * gas/mips/abs.d: Remove CPU-specific assembler and objdump flags,
+ and CPU names from test names.
+ * gas/mips/add.d: Likewise.
+ * gas/mips/and.d: Likewise.
+ * gas/mips/dli.d: Likewise.
+ * gas/mips/jal-empic-elf-2.d: Likewise.
+ * gas/mips/jal-empic-elf-3.d: Likewise.
+ * gas/mips/jal-empic-elf.d: Likewise.
+ * gas/mips/lb-svr4pic.d: Likewise.
+ * gas/mips/lb.d: Likewise.
+ * gas/mips/mips32.d: Likewise.
+ * gas/mips/mips4.d: Likewise.
+ * gas/mips/mips64.d: Likewise.
+ * gas/mips/rol-hw.d: Likewise.
+ * gas/mips/rol.d: Likewise.
+ * gas/mips/rol64-hw.d: Likewise.
+ * gas/mips/rol64.d: Likewise.
+ * gas/mips/elf-jal.d: Likewise. Also, indicate ELF in test name.
+ * gas/mips/mips64-mdmx.d: Tweak printed name to indicate that this
+ test uses the -mdmx flag.
+ * gas/mips/mips64-mips3d.d: Tweak printed name to indicate that
+ this test uses the -mips3d flag.
+ * gas/mips/mips64-mips3d-incl.d: New file.
+
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32.d: New file.
-#objdump: -dr --prefix-addresses -mmips:4000
-#as:-march=4000
+#objdump: -dr --prefix-addresses
#name: MIPS abs
# Test the abs macro.
-#objdump: -dr --prefix-addresses -mmips:4000
+#objdump: -dr --prefix-addresses
#name: MIPS add
# Test the add macro.
-#objdump: -dr --prefix-addresses -mmips:4000
+#objdump: -dr --prefix-addresses
#name: MIPS and
# Test the and macro.
-#objdump: -dr --prefix-addresses -mmips:4000
+#objdump: -dr --prefix-addresses
#name: MIPS dli
-#as: -mips3
# Test the dli macro.
-#objdump: -dr --prefix-addresses -mmips:4000
-#name: MIPS jal
+#objdump: -dr --prefix-addresses
+#name: MIPS ELF jal
#source: jal.s
# Test the jal macro.
-#objdump: -dr --prefix-addresses -mmips:3000 --show-raw-insn
+#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS jal-empic-elf-2
-#as: -mips1 -membedded-pic
+#as: -membedded-pic
# Test the jal macro harder with -membedded-pic.
-#objdump: -dr --prefix-addresses -mmips:3000 --show-raw-insn
+#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS jal-empic-elf-3
-#as: -mips1 -membedded-pic
+#as: -membedded-pic
# Test the jal macro harder with -membedded-pic.
-#objdump: -dr --prefix-addresses -mmips:3000 --show-raw-insn
+#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS jal-empic-elf
-#as: -mips1 -membedded-pic
+#as: -membedded-pic
#source: jal.s
# Test the jal macro with -membedded-pic.
-#objdump: -dr --prefix-addresses -mmips:3000
+#objdump: -dr --prefix-addresses
#name: MIPS lb-svr4pic
-#as: -mips1 -KPIC
+#as: -KPIC
#source: lb-pic.s
# Test the lb macro with -KPIC.
-#objdump: -dr --prefix-addresses -mmips:3000
+#objdump: -dr --prefix-addresses
#name: MIPS lb
-#as: -mips1
# Test the lb macro.
# Some generic MIPS tests
#
+# When adding a new test to this file, try to do the following things:
+#
+# * If testing assembly and disassembly of code, don't forget to test
+# the actual bit encodings of the instructions (using the
+# --show-raw-insn flag to objdump).
+#
+# * Try to run the test for as many architectures as appropriate,
+# using the "run_dump_test_arches" or "run_list_test_arches" functions,
+# along with the output from a call to "mips_arch_list_matching."
+#
+# * Be sure to compare the test output before and after your testsuite
+# changes, to verify that existing and new tests were run as expected.
+# Look for expect ERROR messages in the testsuite .log file to make sure
+# the new expect code did not contain errors.
+
+# To add support for a new CPU to this file, add an appropriate entry
+# to the sequence of "mips_arch_create" function calls below, and test
+# the result. The new CPU should automatically be used when running
+# various tests. If the new CPU is the default CPU for any tool
+# targets, make sure the call to "mips_arch_create" reflects that fact.
+
+
# "LOSE" marks information about tests which fail at a particular point
# in time, but which are not XFAILed. Either they used to pass
# and indicate either regressions or the need to tweak the tests to keep
# up the with code, or they are new tests and it is unknown whether or not
# they should pass as-is for the given object formats.
-proc run_list_test { name opts } {
+
+# The functions below create and manipulate an "architecture data
+# array" which contains entries for each MIPS architecture (or CPU)
+# known to these tests. The array contains the following information
+# for each architecture, indexed by the name of the architecture
+# described by the entry:
+#
+# displayname: The name of the entry to be used for pretty-printing.
+#
+# gprsize: The size in bits of General Purpose Registers provided by
+# the architecture (must be 32 or 64).
+#
+# props: A list of text strings which are associated with the
+# architecture. These include the architecture name as well as
+# information about what instructions the CPU supports. When matching
+# based on properties, an additional property is added to the normal
+# property list, "gpr<gprsize>" so that tests can match CPUs which
+# have GPRs of a specific size. The following properties are most
+# useful when matching properties for generic (i.e., not CPU-specific)
+# tests:
+#
+# mips1, mips2, mips3, mips4, mips5, mips32, mips64
+# The architecture includes the instructions defined
+# by that MIPS ISA.
+#
+# mips3d The architecture includes the MIPS-3D ASE.
+#
+# ror The architecture includes hardware rotate instructions.
+#
+# gpr32, gpr64
+# The architecture provides 32- or 64-bit General Purpose
+# Registers.
+#
+# as_flags: The assembler flags used when assembling tests for this
+# architecture.
+#
+# objdump_flags: The objdump flags used when disassembling tests for
+# this architecture.
+#
+# Most entries in the architecture array will have values in all of
+# the fields above. One entry, "default" represents the default CPU
+# based on the target of the assembler being built. If always has
+# empty "as_flags" and "objdump_flags."
+
+# mips_arch_create ARCH GPRSIZE EXTENDS PROPS AS_FLAGS OBJDUMP_FLAGS \
+# (optional:) DEFAULT_FOR_TARGETS
+#
+# This function creates a new entry in the architecture data array,
+# for the architecture or CPU named ARCH, and fills in the entry
+# according to the rest of the arguments.
+#
+# The new entry's property list is initialized to contain ARCH, any
+# properties specified by PROPS, and the properties associated with
+# the entry specified by EXTENDS. (The new architecture is considered
+# to extend the capabilities provided by that architecture.)
+#
+# If DEFAULT_FOR_TARGETS is specified, it is a list of targets for which
+# this architecture is the default architecture. If "istarget" returns
+# true for any of the targets in the list, a "default" entry will be
+# added to the architecture array which indicates that ARCH is the default
+# architecture.
+proc mips_arch_create {arch gprsize extends props as_flags objdump_flags
+ {default_for_targets {}}} {
+ global mips_arches
+
+ if { [info exists mips_arches($arch)] } {
+ error "mips_arch_create: arch \"$arch\" already exists"
+ }
+ if { $gprsize != 32 && $gprsize != 64 } {
+ error "mips_arch_create: invalid GPR size $gprsize"
+ }
+
+ set archdata(displayname) $arch
+ set archdata(gprsize) $gprsize
+ set archdata(as_flags) $as_flags
+ set archdata(objdump_flags) $objdump_flags
+ set archdata(props) $arch
+ eval lappend archdata(props) $props
+ if { [string length $extends] != 0 } {
+ eval lappend archdata(props) [mips_arch_properties $extends 0]
+ }
+
+ set mips_arches($arch) [array get archdata]
+
+ # Set as default if appropriate.
+ foreach target $default_for_targets {
+ if { [istarget $target] } {
+ if { [info exists mips_arches(default)] } {
+ error "mips_arch_create: default arch already exists"
+ }
+
+ set archdata(displayname) "default = $arch"
+ set archdata(as_flags) ""
+ set archdata(objdump_flags) ""
+
+ set mips_arches(default) [array get archdata]
+ break
+ }
+ }
+}
+
+# mips_arch_list_all
+#
+# This function returns the list of all names of entries in the
+# architecture data array (including the default entry, if a default
+# is known).
+proc mips_arch_list_all {} {
+ global mips_arches
+ return [lsort -dictionary [array names mips_arches]]
+}
+
+# mips_arch_data ARCH
+#
+# This function returns the information associated with ARCH
+# in the architecture data array, in "array get" form.
+proc mips_arch_data {arch} {
+ global mips_arches
+
+ if { ! [info exists mips_arches($arch)] } {
+ error "mips_arch_data: unknown arch \"$arch\""
+ }
+ return $mips_arches($arch)
+}
+
+# mips_arch_displayname ARCH
+#
+# This function returns the printable name associated with ARCH in
+# the architecture data array.
+proc mips_arch_displayname {arch} {
+ array set archdata [mips_arch_data $arch]
+ return $archdata(displayname)
+}
+
+# mips_arch_properties ARCH (optional:) INCLUDE_GPRSIZE
+#
+# This function returns the property list associated with ARCH in the
+# architecture data array. If INCLUDE_GPRSIZE is non-zero, an additional
+# "gpr32" or "gpr64" property will be returned as part of the list based
+# on the architecture's GPR size.
+proc mips_arch_properties {arch {include_gprsize 1}} {
+ array set archdata [mips_arch_data $arch]
+ set props $archdata(props)
+ if { $include_gprsize } {
+ lappend props gpr$archdata(gprsize)
+ }
+ return $props
+}
+
+# mips_arch_as_flags ARCH
+#
+# This function returns the assembler flags associated with ARCH in
+# the architecture data array.
+proc mips_arch_as_flags {arch} {
+ array set archdata [mips_arch_data $arch]
+ return $archdata(as_flags)
+}
+
+# mips_arch_objdump_flags ARCH
+#
+# This function returns the objdump disassembly flags associated with
+# ARCH in the architecture data array.
+proc mips_arch_objdump_flags {arch} {
+ array set archdata [mips_arch_data $arch]
+ return $archdata(objdump_flags)
+}
+
+# mips_arch_matches ARCH PROPMATCHLIST
+#
+# This function returns non-zero if ARCH matches the set of properties
+# described by PROPMATCHLIST. Each entry in PROPMATCHLIST can either
+# be the name of a property which must be matched, or "!" followed by
+# the name of a property which must not be matched. ARCH matches
+# PROPMATCHLIST if and only if all of the conditions specified by
+# PROPMATCHLIST are satisfied.
+proc mips_arch_matches {arch propmatchlist} {
+ foreach pm $propmatchlist {
+ if { [string match {!*} $pm] } {
+ # fail if present.
+ set inverted 1
+ set p [string range $pm 1 end]
+ } {
+ # fail if not present.
+ set inverted 0
+ set p $pm
+ }
+
+ set loc [lsearch -exact [mips_arch_properties $arch] $p]
+
+ # required-absent and found, or required-present and not found: fail.
+ if { ($inverted && $loc != -1) || (! $inverted && $loc == -1) } {
+ return 0
+ }
+ }
+ return 1
+}
+
+# mips_arch_list_matching ARGS
+#
+# This function returns a list of all architectures which match
+# the conditions described by its arguments. Its arguments are
+# taken as a list and used as the PROPMATCHLIST in a call to
+# "mips_arch_matches" for each known architecture.
+proc mips_arch_list_matching {args} {
+ set l ""
+ foreach arch [mips_arch_list_all] {
+ # For now, don't match default arch until we know what its
+ # properties actually are.
+ if { [string compare $arch default] == 0
+ && [string length [mips_arch_properties default]] == 0} {
+ continue;
+ }
+ if { [mips_arch_matches $arch $args] } {
+ lappend l $arch
+ }
+ }
+ return $l
+}
+
+
+# The functions below facilitate running various types of tests.
+
+# run_dump_test_arch NAME ARCH
+#
+# Invoke "run_dump_test" for test NAME, with extra assembler and
+# disassembler flags to test architecture ARCH.
+proc run_dump_test_arch { name arch } {
+ global subdir
+
+ if [catch {run_dump_test $name \
+ "{name {([mips_arch_displayname $arch])}}
+ {objdump {[mips_arch_objdump_flags $arch]}}
+ {as {[mips_arch_as_flags $arch]}}"} rv] {
+ perror "$rv"
+ untested "$subdir/$name ($arch)"
+ }
+}
+
+# run_dump_test_arches NAME ARCH_LIST
+#
+# Invoke "run_dump_test_arch" for test NAME, for each architecture
+# listed in ARCH_LIST.
+proc run_dump_test_arches { name arch_list } {
+ foreach arch $arch_list {
+ run_dump_test_arch "$name" "$arch"
+ }
+}
+
+# run_list_test NAME OPTS (optional): TESTNAME
+#
+# Assemble the file "NAME.d" and compare the assembler standard error
+# output against the regular expressions given in the file "NAME.l".
+# The assembler is passed the flags given in OPTS. If TESTNAME is
+# provided, it will be used as the name of the test.
+proc run_list_test { name opts {testname {}} } {
global srcdir subdir
- set testname "MIPS $name"
+ if { [string length $testname] == 0 } then {
+ set testname "MIPS $name"
+ }
set file $srcdir/$subdir/$name
gas_run ${name}.s $opts ">&dump.out"
if { [regexp_diff "dump.out" "${file}.l"] } then {
pass $testname
}
+# run_list_test_arch NAME OPTS ARCH
+#
+# Invoke "run_list_test" for test NAME with options OPTS, with extra
+# assembler flags to test architecture ARCH.
+proc run_list_test_arch { name opts arch } {
+ global subdir
+
+ set testname "MIPS $name ([mips_arch_displayname $arch])"
+ if [catch {run_list_test "$name" "$opts [mips_arch_as_flags $arch]" \
+ "$testname"} rv] {
+ perror "$rv"
+ untested "$testname"
+ }
+}
+
+# run_list_test_arches NAME OPTS ARCH_LIST
+#
+# Invoke "run_list_test_arch" for test NAME with options OPTS, for each
+# architecture listed in ARCH_LIST.
+proc run_list_test_arches { name opts arch_list } {
+ foreach arch $arch_list {
+ run_list_test_arch "$name" "$opts" "$arch"
+ }
+}
+
+
+# Create the architecture data array by providing data for all
+# known architectures.
+#
+# Note that several targets pick default CPU based on ABI. We
+# can't easily handle that; do NOT list those targets as defaulting
+# to any architecture.
+mips_arch_create mips1 32 {} {} \
+ { -march=mips1 -mtune=mips1 } { -mmips:3000 }
+mips_arch_create mips2 32 mips1 {} \
+ { -march=mips2 -mtune=mips2 } { -mmips:6000 }
+mips_arch_create mips3 64 mips2 {} \
+ { -march=mips3 -mtune=mips3 } { -mmips:4000 }
+mips_arch_create mips4 64 mips3 {} \
+ { -march=mips4 -mtune=mips4 } { -mmips:8000 }
+mips_arch_create mips5 64 mips4 {} \
+ { -march=mips5 -mtune=mips5 } { -mmips:mips5 }
+mips_arch_create mips32 32 mips2 {} \
+ { -march=mips32 -mtune=mips32 } { -mmips:isa32 } \
+ { mipsisa32-*-* mipsisa32el-*-* }
+mips_arch_create mips64 64 mips5 { mips32 } \
+ { -march=mips64 -mtune=mips64 } { -mmips:isa64 } \
+ { mipsisa64-*-* mipsisa64el-*-* }
+mips_arch_create r3000 32 mips1 {} \
+ { -march=r3000 -mtune=r3000 } { -mmips:3000 }
+mips_arch_create r3900 32 mips1 {} \
+ { -march=r3900 -mtune=r3900 } { -mmips:3900 } \
+ { mipstx39-*-* mipstx39el-*-* }
+mips_arch_create r4000 64 mips3 {} \
+ { -march=r4000 -mtune=r4000 } { -mmips:4000 }
+mips_arch_create vr5400 64 mips4 { ror } \
+ { -march=vr5400 -mtune=vr5400 } { -mmips:5400 }
+mips_arch_create sb1 64 mips64 { mips3d } \
+ { -march=sb1 -mtune=sb1 } { -mmips:sb1 } \
+ { mipsisa64sb1-*-* mipsisa64sb1el-*-* }
+
+
+#
+# And now begin the actual tests!
+#
+
if { [istarget mips*-*-*] } then {
set no_mips16 0
set elf [expr [istarget *-*-elf*] || [istarget *-*-irix5*] || [istarget *-*-irix6* ] || [istarget *-*-linux*] || [istarget *-*-netbsd*] ]
set el ""
}
- run_dump_test "abs"
- run_dump_test "add"
- run_dump_test "and"
+ run_dump_test_arches "abs" [mips_arch_list_matching mips1]
+ run_dump_test_arches "add" [mips_arch_list_matching mips1]
+ run_dump_test_arches "and" [mips_arch_list_matching mips1]
run_dump_test "break20"
run_dump_test "trap20"
# See http://sources.redhat.com/ml/binutils/2001-10/msg00418.html for
# more information. Not sure if the fixes there are correct; should
# branches to external labels be allowed for ECOFF?
- run_dump_test "beq"
- run_dump_test "bge"
- run_dump_test "bgeu"
- run_dump_test "blt"
- run_dump_test "bltu"
- run_dump_test "branch-misc-1"
- run_list_test "branch-misc-2" ""
+ # XXX FIXME: the following tests require -mips2 disasm for
+ # branch-likely instructions. They should be split.
+ run_dump_test_arches "beq" [mips_arch_list_matching mips2]
+ run_dump_test_arches "bge" [mips_arch_list_matching mips2]
+ run_dump_test_arches "bgeu" [mips_arch_list_matching mips2]
+ run_dump_test_arches "blt" [mips_arch_list_matching mips2]
+ run_dump_test_arches "bltu" [mips_arch_list_matching mips2]
+ run_dump_test_arches "branch-misc-1" [mips_arch_list_matching mips1]
+ run_list_test_arches "branch-misc-2" "" [mips_arch_list_matching mips1]
if $ilocks {
run_dump_test "div-ilocks"
} else {
run_dump_test "div"
}
- run_dump_test "dli"
+ run_dump_test_arches "dli" [mips_arch_list_matching mips3]
if $elf {
- run_dump_test "elf-jal"
+ run_dump_test_arches "elf-jal" [mips_arch_list_matching mips1]
} else {
run_dump_test "jal"
}
# It appears that it broke between 2000-03-11 00:00UTC and
# 2000-03-12 00:00 UTC.
if $ecoff { run_dump_test "jal-empic" }
- if $elf { run_dump_test "jal-empic-elf" }
- if $elf { run_dump_test "jal-empic-elf-2" }
- if $elf { run_dump_test "jal-empic-elf-3" }
- run_list_test "jal-range" ""
+ if $elf {
+ run_dump_test_arches "jal-empic-elf" [mips_arch_list_matching mips1]
+ run_dump_test_arches "jal-empic-elf-2" [mips_arch_list_matching mips1]
+ run_dump_test_arches "jal-empic-elf-3" [mips_arch_list_matching mips1]
+ }
+ run_list_test_arches "jal-range" "" [mips_arch_list_matching mips1]
if !$aout { run_dump_test "la" }
if $elf { run_dump_test "la-svr4pic" }
if $elf { run_dump_test "la-xgot" }
# Not sure when it first cropped up, but may be related to addition of
# "la" -> "addiu" pattern in MIPS opcode table long ago.
if $ecoff { run_dump_test "la-empic" }
- if !$aout { run_dump_test "lb" }
- if $elf { run_dump_test "lb-svr4pic" }
+ if !$aout {
+ # XXX FIXME: Has mips2 and later insns with mips1 disassemblies.
+ # (Should split and then use appropriate arch lists.)
+ run_dump_test_arches "lb" [mips_arch_list_matching !mips2]
+ }
+ if $elf {
+ run_dump_test_arches "lb-svr4pic" [mips_arch_list_matching mips1]
+ }
if $elf {
# Both versions specify the cpu, so we can run both regardless of
# the interlocking in the configured default cpu.
if $elf { run_dump_test "ld-svr4pic" }
if $elf { run_dump_test "ld-xgot" }
if $ecoff { run_dump_test "ld-empic" }
- run_dump_test "li"
+ run_dump_test_arches "li" [mips_arch_list_matching mips1]
if !$aout { run_dump_test "lifloat" }
if $elf { run_dump_test "lif-svr4pic" }
if $elf { run_dump_test "lif-xgot" }
# It appears that it broke between 2000-03-11 00:00UTC and
# 2000-03-12 00:00 UTC.
if $ecoff { run_dump_test "lif-empic" }
- run_dump_test "mips4"
+ run_dump_test_arches "mips4" [mips_arch_list_matching mips4]
if $ilocks {
run_dump_test "mul-ilocks"
} else {
run_dump_test "mul"
}
- run_dump_test "rol"
- run_dump_test "rol-hw"
- run_dump_test "rol64"
- run_dump_test "rol64-hw"
+
+ run_dump_test_arches "rol" [mips_arch_list_matching !ror]
+ run_dump_test_arches "rol-hw" [mips_arch_list_matching ror]
+
+ run_dump_test_arches "rol64" [mips_arch_list_matching gpr64 !ror]
+ run_dump_test_arches "rol64-hw" [mips_arch_list_matching gpr64 ror]
+
if !$aout { run_dump_test "sb" }
run_dump_test "trunc"
if !$aout { run_dump_test "ulh" }
run_dump_test "perfcount"
run_dump_test "lineno"
run_dump_test "sync"
- run_dump_test "mips32"
- run_dump_test "mips64"
+
+ run_dump_test_arches "mips32" [mips_arch_list_matching mips32]
+
+ run_dump_test_arches "mips64" [mips_arch_list_matching mips64]
+
run_dump_test "mips64-mips3d"
+ run_dump_test_arches "mips64-mips3d-incl" [mips_arch_list_matching mips3d]
+
run_dump_test "mips64-mdmx"
run_dump_test "sb1-ext-mdmx"
run_dump_test "sb1-ext-ps"
-#objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa32
+#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS MIPS32 instructions
-#as: -mips32
# Check MIPS32 instruction assembly
-#objdump: -dr --prefix-addresses -mmips:5000
+#objdump: -dr --prefix-addresses
#name: MIPS mips4
-#as: -mips4 -mtune=r5000
# Test the mips4 macros.
#objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa64
-#name: MIPS MIPS64 MDMX ASE instructions
+#name: MIPS MIPS64 MDMX ASE instructions (-mdmx flag)
#as: -mips64 -mdmx
# Check MIPS64 MDMX ASE instruction assembly and disassembly
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS MIPS64 MIPS-3D ASE instructions
+#source: mips64-mips3d.s
+
+# Check MIPS64 MIPS-3D ASE instruction assembly and disassembly
+# Same as mips64-mips3d.d, but does not need -mips3d assembler
+# flag because the archiectures that use this always include MIPS-3D.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 46d34118 addr\.ps \$f4,\$f8,\$f19
+0+0004 <[^>]*> 4520fffe bc1any2f \$fcc0,0+0000 <text_label>
+0+0008 <[^>]*> 00000000 nop
+0+000c <[^>]*> 4528fffc bc1any2f \$fcc2,0+0000 <text_label>
+0+0010 <[^>]*> 00000000 nop
+0+0014 <[^>]*> 4521fffa bc1any2t \$fcc0,0+0000 <text_label>
+0+0018 <[^>]*> 00000000 nop
+0+001c <[^>]*> 4531fff8 bc1any2t \$fcc4,0+0000 <text_label>
+0+0020 <[^>]*> 00000000 nop
+0+0024 <[^>]*> 4540fff6 bc1any4f \$fcc0,0+0000 <text_label>
+0+0028 <[^>]*> 00000000 nop
+0+002c <[^>]*> 4550fff4 bc1any4f \$fcc4,0+0000 <text_label>
+0+0030 <[^>]*> 00000000 nop
+0+0034 <[^>]*> 4541fff2 bc1any4t \$fcc0,0+0000 <text_label>
+0+0038 <[^>]*> 00000000 nop
+0+003c <[^>]*> 4551fff0 bc1any4t \$fcc4,0+0000 <text_label>
+0+0040 <[^>]*> 00000000 nop
+0+0044 <[^>]*> 46334070 cabs\.f\.d \$fcc0,\$f8,\$f19
+0+0048 <[^>]*> 46334270 cabs\.f\.d \$fcc2,\$f8,\$f19
+0+004c <[^>]*> 46134070 cabs\.f\.s \$fcc0,\$f8,\$f19
+0+0050 <[^>]*> 46134270 cabs\.f\.s \$fcc2,\$f8,\$f19
+0+0054 <[^>]*> 46d34070 cabs\.f\.ps \$fcc0,\$f8,\$f19
+0+0058 <[^>]*> 46d34270 cabs\.f\.ps \$fcc2,\$f8,\$f19
+0+005c <[^>]*> 46334071 cabs\.un\.d \$fcc0,\$f8,\$f19
+0+0060 <[^>]*> 46334271 cabs\.un\.d \$fcc2,\$f8,\$f19
+0+0064 <[^>]*> 46134071 cabs\.un\.s \$fcc0,\$f8,\$f19
+0+0068 <[^>]*> 46134271 cabs\.un\.s \$fcc2,\$f8,\$f19
+0+006c <[^>]*> 46d34071 cabs\.un\.ps \$fcc0,\$f8,\$f19
+0+0070 <[^>]*> 46d34271 cabs\.un\.ps \$fcc2,\$f8,\$f19
+0+0074 <[^>]*> 46334072 cabs\.eq\.d \$fcc0,\$f8,\$f19
+0+0078 <[^>]*> 46334272 cabs\.eq\.d \$fcc2,\$f8,\$f19
+0+007c <[^>]*> 46134072 cabs\.eq\.s \$fcc0,\$f8,\$f19
+0+0080 <[^>]*> 46134272 cabs\.eq\.s \$fcc2,\$f8,\$f19
+0+0084 <[^>]*> 46d34072 cabs\.eq\.ps \$fcc0,\$f8,\$f19
+0+0088 <[^>]*> 46d34272 cabs\.eq\.ps \$fcc2,\$f8,\$f19
+0+008c <[^>]*> 46334073 cabs\.ueq\.d \$fcc0,\$f8,\$f19
+0+0090 <[^>]*> 46334273 cabs\.ueq\.d \$fcc2,\$f8,\$f19
+0+0094 <[^>]*> 46134073 cabs\.ueq\.s \$fcc0,\$f8,\$f19
+0+0098 <[^>]*> 46134273 cabs\.ueq\.s \$fcc2,\$f8,\$f19
+0+009c <[^>]*> 46d34073 cabs\.ueq\.ps \$fcc0,\$f8,\$f19
+0+00a0 <[^>]*> 46d34273 cabs\.ueq\.ps \$fcc2,\$f8,\$f19
+0+00a4 <[^>]*> 46334074 cabs\.olt\.d \$fcc0,\$f8,\$f19
+0+00a8 <[^>]*> 46334274 cabs\.olt\.d \$fcc2,\$f8,\$f19
+0+00ac <[^>]*> 46134074 cabs\.olt\.s \$fcc0,\$f8,\$f19
+0+00b0 <[^>]*> 46134274 cabs\.olt\.s \$fcc2,\$f8,\$f19
+0+00b4 <[^>]*> 46d34074 cabs\.olt\.ps \$fcc0,\$f8,\$f19
+0+00b8 <[^>]*> 46d34274 cabs\.olt\.ps \$fcc2,\$f8,\$f19
+0+00bc <[^>]*> 46334075 cabs\.ult\.d \$fcc0,\$f8,\$f19
+0+00c0 <[^>]*> 46334275 cabs\.ult\.d \$fcc2,\$f8,\$f19
+0+00c4 <[^>]*> 46134075 cabs\.ult\.s \$fcc0,\$f8,\$f19
+0+00c8 <[^>]*> 46134275 cabs\.ult\.s \$fcc2,\$f8,\$f19
+0+00cc <[^>]*> 46d34075 cabs\.ult\.ps \$fcc0,\$f8,\$f19
+0+00d0 <[^>]*> 46d34275 cabs\.ult\.ps \$fcc2,\$f8,\$f19
+0+00d4 <[^>]*> 46334076 cabs\.ole\.d \$fcc0,\$f8,\$f19
+0+00d8 <[^>]*> 46334276 cabs\.ole\.d \$fcc2,\$f8,\$f19
+0+00dc <[^>]*> 46134076 cabs\.ole\.s \$fcc0,\$f8,\$f19
+0+00e0 <[^>]*> 46134276 cabs\.ole\.s \$fcc2,\$f8,\$f19
+0+00e4 <[^>]*> 46d34076 cabs\.ole\.ps \$fcc0,\$f8,\$f19
+0+00e8 <[^>]*> 46d34276 cabs\.ole\.ps \$fcc2,\$f8,\$f19
+0+00ec <[^>]*> 46334077 cabs\.ule\.d \$fcc0,\$f8,\$f19
+0+00f0 <[^>]*> 46334277 cabs\.ule\.d \$fcc2,\$f8,\$f19
+0+00f4 <[^>]*> 46134077 cabs\.ule\.s \$fcc0,\$f8,\$f19
+0+00f8 <[^>]*> 46134277 cabs\.ule\.s \$fcc2,\$f8,\$f19
+0+00fc <[^>]*> 46d34077 cabs\.ule\.ps \$fcc0,\$f8,\$f19
+0+0100 <[^>]*> 46d34277 cabs\.ule\.ps \$fcc2,\$f8,\$f19
+0+0104 <[^>]*> 46334078 cabs\.sf\.d \$fcc0,\$f8,\$f19
+0+0108 <[^>]*> 46334278 cabs\.sf\.d \$fcc2,\$f8,\$f19
+0+010c <[^>]*> 46134078 cabs\.sf\.s \$fcc0,\$f8,\$f19
+0+0110 <[^>]*> 46134278 cabs\.sf\.s \$fcc2,\$f8,\$f19
+0+0114 <[^>]*> 46d34078 cabs\.sf\.ps \$fcc0,\$f8,\$f19
+0+0118 <[^>]*> 46d34278 cabs\.sf\.ps \$fcc2,\$f8,\$f19
+0+011c <[^>]*> 46334079 cabs\.ngle\.d \$fcc0,\$f8,\$f19
+0+0120 <[^>]*> 46334279 cabs\.ngle\.d \$fcc2,\$f8,\$f19
+0+0124 <[^>]*> 46134079 cabs\.ngle\.s \$fcc0,\$f8,\$f19
+0+0128 <[^>]*> 46134279 cabs\.ngle\.s \$fcc2,\$f8,\$f19
+0+012c <[^>]*> 46d34079 cabs\.ngle\.ps \$fcc0,\$f8,\$f19
+0+0130 <[^>]*> 46d34279 cabs\.ngle\.ps \$fcc2,\$f8,\$f19
+0+0134 <[^>]*> 4633407a cabs\.seq\.d \$fcc0,\$f8,\$f19
+0+0138 <[^>]*> 4633427a cabs\.seq\.d \$fcc2,\$f8,\$f19
+0+013c <[^>]*> 4613407a cabs\.seq\.s \$fcc0,\$f8,\$f19
+0+0140 <[^>]*> 4613427a cabs\.seq\.s \$fcc2,\$f8,\$f19
+0+0144 <[^>]*> 46d3407a cabs\.seq\.ps \$fcc0,\$f8,\$f19
+0+0148 <[^>]*> 46d3427a cabs\.seq\.ps \$fcc2,\$f8,\$f19
+0+014c <[^>]*> 4633407b cabs\.ngl\.d \$fcc0,\$f8,\$f19
+0+0150 <[^>]*> 4633427b cabs\.ngl\.d \$fcc2,\$f8,\$f19
+0+0154 <[^>]*> 4613407b cabs\.ngl\.s \$fcc0,\$f8,\$f19
+0+0158 <[^>]*> 4613427b cabs\.ngl\.s \$fcc2,\$f8,\$f19
+0+015c <[^>]*> 46d3407b cabs\.ngl\.ps \$fcc0,\$f8,\$f19
+0+0160 <[^>]*> 46d3427b cabs\.ngl\.ps \$fcc2,\$f8,\$f19
+0+0164 <[^>]*> 4633407c cabs\.lt\.d \$fcc0,\$f8,\$f19
+0+0168 <[^>]*> 4633427c cabs\.lt\.d \$fcc2,\$f8,\$f19
+0+016c <[^>]*> 4613407c cabs\.lt\.s \$fcc0,\$f8,\$f19
+0+0170 <[^>]*> 4613427c cabs\.lt\.s \$fcc2,\$f8,\$f19
+0+0174 <[^>]*> 46d3407c cabs\.lt\.ps \$fcc0,\$f8,\$f19
+0+0178 <[^>]*> 46d3427c cabs\.lt\.ps \$fcc2,\$f8,\$f19
+0+017c <[^>]*> 4633407d cabs\.nge\.d \$fcc0,\$f8,\$f19
+0+0180 <[^>]*> 4633427d cabs\.nge\.d \$fcc2,\$f8,\$f19
+0+0184 <[^>]*> 4613407d cabs\.nge\.s \$fcc0,\$f8,\$f19
+0+0188 <[^>]*> 4613427d cabs\.nge\.s \$fcc2,\$f8,\$f19
+0+018c <[^>]*> 46d3407d cabs\.nge\.ps \$fcc0,\$f8,\$f19
+0+0190 <[^>]*> 46d3427d cabs\.nge\.ps \$fcc2,\$f8,\$f19
+0+0194 <[^>]*> 4633407e cabs\.le\.d \$fcc0,\$f8,\$f19
+0+0198 <[^>]*> 4633427e cabs\.le\.d \$fcc2,\$f8,\$f19
+0+019c <[^>]*> 4613407e cabs\.le\.s \$fcc0,\$f8,\$f19
+0+01a0 <[^>]*> 4613427e cabs\.le\.s \$fcc2,\$f8,\$f19
+0+01a4 <[^>]*> 46d3407e cabs\.le\.ps \$fcc0,\$f8,\$f19
+0+01a8 <[^>]*> 46d3427e cabs\.le\.ps \$fcc2,\$f8,\$f19
+0+01ac <[^>]*> 4633407f cabs\.ngt\.d \$fcc0,\$f8,\$f19
+0+01b0 <[^>]*> 4633427f cabs\.ngt\.d \$fcc2,\$f8,\$f19
+0+01b4 <[^>]*> 4613407f cabs\.ngt\.s \$fcc0,\$f8,\$f19
+0+01b8 <[^>]*> 4613427f cabs\.ngt\.s \$fcc2,\$f8,\$f19
+0+01bc <[^>]*> 46d3407f cabs\.ngt\.ps \$fcc0,\$f8,\$f19
+0+01c0 <[^>]*> 46d3427f cabs\.ngt\.ps \$fcc2,\$f8,\$f19
+0+01c4 <[^>]*> 46c09924 cvt\.pw\.ps \$f4,\$f19
+0+01c8 <[^>]*> 46809926 cvt\.ps\.pw \$f4,\$f19
+0+01cc <[^>]*> 46d3411a mulr\.ps \$f4,\$f8,\$f19
+0+01d0 <[^>]*> 46209a1d recip1\.d \$f8,\$f19
+0+01d4 <[^>]*> 46009a1d recip1\.s \$f8,\$f19
+0+01d8 <[^>]*> 46c09a1d recip1\.ps \$f8,\$f19
+0+01dc <[^>]*> 4633411c recip2\.d \$f4,\$f8,\$f19
+0+01e0 <[^>]*> 4613411c recip2\.s \$f4,\$f8,\$f19
+0+01e4 <[^>]*> 46d3411c recip2\.ps \$f4,\$f8,\$f19
+0+01e8 <[^>]*> 46209a1e rsqrt1\.d \$f8,\$f19
+0+01ec <[^>]*> 46009a1e rsqrt1\.s \$f8,\$f19
+0+01f0 <[^>]*> 46c09a1e rsqrt1\.ps \$f8,\$f19
+0+01f4 <[^>]*> 4633411f rsqrt2\.d \$f4,\$f8,\$f19
+0+01f8 <[^>]*> 4613411f rsqrt2\.s \$f4,\$f8,\$f19
+0+01fc <[^>]*> 46d3411f rsqrt2\.ps \$f4,\$f8,\$f19
+ \.\.\.
#objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa64
-#name: MIPS MIPS64 MIPS-3D ASE instructions
+#name: MIPS MIPS64 MIPS-3D ASE instructions (-mips3d flag)
#as: -mips64 -mips3d
# Check MIPS64 MIPS-3D ASE instruction assembly and disassembly
-#objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa64
+#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS MIPS64 instructions
-#as: -mips64
# Check MIPS64 instruction assembly
-#objdump: -dr --prefix-addresses -mmips:5400
-#as: -march=vr5400 -mtune=vr5400
-#name: MIPS hardware rol (vr5400)
+#objdump: -dr --prefix-addresses
+#name: MIPS hardware rol/ror
#source: rol.s
#stderr: rol-hw.l
-#objdump: -dr --prefix-addresses -mmips:3000
-#as: -march=r3000 -mtune=r3000
-#name: MIPS macro rol (r3000)
+#objdump: -dr --prefix-addresses
+#name: MIPS macro rol/ror
#stderr: rol.l
# Test the rol and ror macros.
-#objdump: -dr --prefix-addresses -mmips:5400
-#as: -march=vr5400 -mtune=vr5400
-#name: MIPS hardware drol (vr5400)
+#objdump: -dr --prefix-addresses
+#name: MIPS hardware drol/dror
#source: rol64.s
#stderr: rol64-hw.l
-#objdump: -dr --prefix-addresses -mmips:4000
-#as: -march=r4000 -mtune=r4000
-#name: MIPS macro drol (r4000)
+#objdump: -dr --prefix-addresses
+#name: MIPS macro drol/dror
#stderr: rol64.l
# Test the drol and dror macros.
projects / binutils-gdb.git / commitdiff