* doc/invoke.texi (ARM Options): Document -munaligned-access.

From-SVN: r189604

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ce9cea0c98ffb714b19c5a916c19ff8b0d81b4e1..cb7ea3db3c5579970589772510c2570af398bafe 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2012-07-18  Nick Clifton  <nickc@redhat.com>
+
+       * doc/invoke.texi (ARM Options): Document -munaligned-access.
+
 2012-07-18  Oleg Endo  <olegendo@gcc.gnu.org>
 
        * config/sh/sh.md (mulsidi3, umulsidi3): Remove constraints in
@@ -12,7 +16,7 @@
        PR target/33135
        * config/sh/sh.opt (mieee): Use Var instead of Mask.  Correct
        description.
-       * config/sh/sh.c (sh_option_override): Do not change 
+       * config/sh/sh.c (sh_option_override): Do not change
        flag_finite_math_only.  Set TARGET_IEEE to complement of
        flag_finite_math_only.
        * doc/invoke.texi (SH options): Add mno-ieee.  Correct description

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 1207f85127cf75f5c415634a84620535066f2ae7..bbd99b7d4888edfab8429dae30d16856ceb877dd 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -497,7 +497,8 @@ Objective-C and Objective-C++ Dialects}.
 -mcaller-super-interworking  -mcallee-super-interworking @gol
 -mtp=@var{name} -mtls-dialect=@var{dialect} @gol
 -mword-relocations @gol
--mfix-cortex-m3-ldrd}
+-mfix-cortex-m3-ldrd @gol
+-munaligned-access}
 
 @emph{AVR Options}
 @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol
@@ -11049,6 +11050,23 @@ with overlapping destination and base registers are used.  This option avoids
 generating these instructions.  This option is enabled by default when
 @option{-mcpu=cortex-m3} is specified.
 
+@item -munaligned-access
+@itemx -mno-unaligned-access
+@opindex munaligned-access
+@opindex mno-unaligned-access
+Enables (or disables) reading and writing of 16- and 32- bit values
+from addresses that are not 16- or 32- bit aligned.  By default
+unaligned access is disabled for all pre-ARMv6 and all ARMv6-M
+architectures, and enabled for all other architectures.  If unaligned
+access is not enabled then words in packed data structures will be
+accessed a byte at a time.
+
+The ARM attribute @code{Tag_CPU_unaligned_access} will be set in the
+generated object file to either true or false, depending upon the
+setting of this option.  If unaligned access is enabled then the
+preprocessor symbol @code{__ARM_FEATURE_UNALIGNED} will also be
+defined.
+
 @end table
 
 @node AVR Options