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i965: Move PIPELINE_SELECT to the top of gen6 3d pipeline setup.
author
Eric Anholt
<eric@anholt.net>
Mon, 21 Dec 2009 21:08:41 +0000
(13:08 -0800)
committer
Eric Anholt
<eric@anholt.net>
Thu, 25 Feb 2010 18:53:08 +0000
(10:53 -0800)
src/mesa/drivers/dri/i965/brw_state_upload.c
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diff --git
a/src/mesa/drivers/dri/i965/brw_state_upload.c
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 824502ca6ebf0265a210df9f351f214a0609b6d5..aa83d7ad18e33b4ee5d2d56bc2d57809895fc157 100644
(file)
--- a/
src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/
src/mesa/drivers/dri/i965/brw_state_upload.c
@@
-116,6
+116,8
@@
const struct brw_tracked_state *gen6_atoms[] =
&gen6_cc_vp,
/* Command packets: */
+ &brw_invarient_state,
+
&gen6_viewport_state, /* must do after *_vp stages */
&gen6_urb,
@@
-138,8
+140,6
@@
const struct brw_tracked_state *gen6_atoms[] =
&gen6_scissor_state,
- &brw_invarient_state,
-
&brw_state_base_address,
&gen6_binding_table_pointers,