expand out integer min/max mode table

diff --git a/openpower/sv/rfc/ls013.mdwn b/openpower/sv/rfc/ls013.mdwn
index fe5c7ee8b13a16e893d13567f534e670335665c2..9e38734f5c4d42c17f24d28f2cb45830fc18185d 100644 (file)
--- a/openpower/sv/rfc/ls013.mdwn
+++ b/openpower/sv/rfc/ls013.mdwn
@@ -204,22 +204,22 @@ Assembly Aliases: see
 These are signed and unsigned, min or max.  SVP64 Prefixing defines Saturation
 semantics therefore Saturated variants of these instructions need not be proposed.
 
-## Integer MinMax Mode
+## Integer Min/Max Mode
 
 * bit 0: set if word variant else dword
 * bit 1: set if signed else unsigned
 * bit 2: set if max else min
 
-| `IMM` | Assembly Alias     |
-|-------|--------------------|
-| 000   | minu RT,RA,RB      |
-| 001   | maxu RT,RA,RB      |           
-| 010   | mins RT,RA,RB      |
-| 011   | maxs RT,RA,RB      |           
-| 100   | minuw RT,RA,RB      |
-| 101  | maxuw RT,RA,RB      |           
-| 110   | minsw RT,RA,RB      |
-| 111   | maxsw RT,RA,RB      |    
+| `IMM` | Assembly Alias   | Semantics                                    |
+|-------|------------------|----------------------------------------------|
+| 000   | `minu RT,RA,RB`  | `RT = (uint64_t)RA < (uint64_t)RB ? RA : RB` |
+| 001   | `maxu RT,RA,RB`  | `RT = (uint64_t)RA > (uint64_t)RB ? RA : RB` |
+| 010   | `mins RT,RA,RB`  | `RT =  (int64_t)RA < (int64_t)RB  ? RA : RB` |
+| 011   | `maxs RT,RA,RB`  | `RT =  (int64_t)RA > (int64_t)RB  ? RA : RB` |
+| 100   | `minuw RT,RA,RB` | `RT = (uint32_t)RA < (uint32_t)RB ? RA : RB` |
+| 101   | `maxuw RT,RA,RB` | `RT = (uint32_t)RA > (uint32_t)RB ? RA : RB` |
+| 110   | `minsw RT,RA,RB` | `RT =  (int32_t)RA < (int32_t)RB  ? RA : RB` |
+| 111   | `maxsw RT,RA,RB` | `RT =  (int32_t)RA > (int32_t)RB  ? RA : RB` |
        
 ## Minimum Unsigned