Added prefix proposal 2019 link, thx Jacob

diff --git a/meetings/sync_up/sync_up_2023-11-28.mdwn b/meetings/sync_up/sync_up_2023-11-28.mdwn
index 70bed2d9e05bcf35cfff1e93589a910705980484..19eb54d79a1e6dcb57aa04152ba5579c2b6d7f40 100644 (file)
--- a/meetings/sync_up/sync_up_2023-11-28.mdwn
+++ b/meetings/sync_up/sync_up_2023-11-28.mdwn
@@ -23,6 +23,7 @@
 * Clarification of the scope of new grants.
   See [[meetings/dmitry_2023-11-24]] notes for more context.
 
+- SimpleV prefix proposal from 2019: <https://libre-soc.org/simple_v_extension/sv_prefix_proposal/>
 - RISC-V example extension: <https://github.com/riscv-software-src/riscv-isa-sim/blob/master/customext/cflush.cc>
 - The first step is to make modifications to `svanalysis.py` to classify the RISC-V instructions.
 - Standard RISC-V opcode format: <https://github.com/riscv/riscv-opcodes>