* cr16-dis.c (match_opcode): Truncate mcode to 32 bit and

	adjusted the mask for 32-bit branch instruction.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 479eed9e79a33820adf9093e9658d75cefd2fdaa..cb072c73d5e5203320fef0fb61f3135d0b86fbbd 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2008-11-27  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
+
+       * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
+       adjusted the mask for 32-bit branch instruction.
+
 2008-11-27  Alan Modra  <amodra@bigpond.net.au>
 
        * ppc-opc.c (extract_sprg): Correct operand range check.

diff --git a/opcodes/cr16-dis.c b/opcodes/cr16-dis.c
index de3eb753bf0f39c86aed8a94ee583d256f3ae0b2..2627141d0faef76941bbb6976e6d2a8d1ec41766 100644 (file)
--- a/opcodes/cr16-dis.c
+++ b/opcodes/cr16-dis.c
@@ -322,7 +322,7 @@ match_opcode (void)
 {
   unsigned long mask;
   /* The instruction 'constant' opcode doewsn't exceed 32 bits.  */
-  unsigned long doubleWord = words[1] + (words[0] << 16);
+  unsigned long doubleWord = (words[1] + (words[0] << 16)) & 0xffffffff;
 
   /* Start searching from end of instruction table.  */
   instruction = &cr16_instruction[NUMOPCODES - 2];
@@ -331,6 +331,10 @@ match_opcode (void)
   while (instruction >= cr16_instruction)
     {
       mask = build_mask ();
+      /* Adjust mask for bcond with 32-bit size instruction */
+      if ((IS_INSN_MNEMONIC("b") && instruction->size == 2))
+        mask = 0xff0f0000;
+
       if ((doubleWord & mask) == BIN (instruction->match,
                                       instruction->match_bits))
         return 1;