[AArch64, 1/6] Enable ARMv8.5-A in gcc
authorSudakshina Das <sudi.das@arm.com>
Wed, 9 Jan 2019 14:05:55 +0000 (14:05 +0000)
committerSudakshina Das <sudi@gcc.gnu.org>
Wed, 9 Jan 2019 14:05:55 +0000 (14:05 +0000)
This patch is part of a series that enables ARMv8.5-A in GCC and
adds Branch Target Identification Mechanism.

*** gcc/ChangeLog ***

2018-01-09  Sudakshina Das  <sudi.das@arm.com>

* config/aarch64/aarch64-arches.def: Define AARCH64_ARCH for
ARMv8.5-A.
* gcc/config/aarch64/aarch64.h (AARCH64_FL_V8_5): New.
(AARCH64_FL_FOR_ARCH8_5, AARCH64_ISA_V8_5): New.
* gcc/doc/invoke.texi: Document ARMv8.5-A.

From-SVN: r267765

gcc/ChangeLog
gcc/config/aarch64/aarch64-arches.def
gcc/config/aarch64/aarch64.h
gcc/doc/invoke.texi

index 6cd2690ae808ef9f76b656c9250ea03ef0fd90fc..5aa91caf2154388f1e0f2a7964939f34fcd4cc3e 100644 (file)
@@ -1,3 +1,11 @@
+2018-01-09  Sudakshina Das  <sudi.das@arm.com>
+
+       * config/aarch64/aarch64-arches.def: Define AARCH64_ARCH for
+       ARMv8.5-A.
+       * gcc/config/aarch64/aarch64.h (AARCH64_FL_V8_5): New.
+       (AARCH64_FL_FOR_ARCH8_5, AARCH64_ISA_V8_5): New.
+       * gcc/doc/invoke.texi: Document ARMv8.5-A.
+
 2019-01-09  Alejandro Martinez  <alejandro.martinezvicente@arm.com>
 
        * config/aarch64/aarch64-sve.md (copysign<mode>3): New define_expand.
index 87b31e71df52b7df93b5d1ff951a41c431a7b45c..d258bd492443e37b5a8dad69a07e3b71b3a0c0fb 100644 (file)
@@ -35,5 +35,6 @@ AARCH64_ARCH("armv8.1-a",     generic,             8_1A,      8,  AARCH64_FL_FOR_ARCH8_1)
 AARCH64_ARCH("armv8.2-a",     generic,      8_2A,      8,  AARCH64_FL_FOR_ARCH8_2)
 AARCH64_ARCH("armv8.3-a",     generic,      8_3A,      8,  AARCH64_FL_FOR_ARCH8_3)
 AARCH64_ARCH("armv8.4-a",     generic,      8_4A,      8,  AARCH64_FL_FOR_ARCH8_4)
+AARCH64_ARCH("armv8.5-a",     generic,      8_5A,      8,  AARCH64_FL_FOR_ARCH8_5)
 
 #undef AARCH64_ARCH
index 2617a8c27779a8a1f5a649518d387abb64672135..1d8a0ef683e54fdfbd3d66dd87769e5d4ea61518 100644 (file)
@@ -177,6 +177,9 @@ extern unsigned aarch64_architecture_version;
 /* Statistical Profiling extensions.  */
 #define AARCH64_FL_PROFILE    (1 << 21)
 
+/* ARMv8.5-A architecture extensions.  */
+#define AARCH64_FL_V8_5              (1 << 22)  /* Has ARMv8.5-A features.  */
+
 /* Has FP and SIMD.  */
 #define AARCH64_FL_FPSIMD     (AARCH64_FL_FP | AARCH64_FL_SIMD)
 
@@ -195,6 +198,8 @@ extern unsigned aarch64_architecture_version;
 #define AARCH64_FL_FOR_ARCH8_4                 \
   (AARCH64_FL_FOR_ARCH8_3 | AARCH64_FL_V8_4 | AARCH64_FL_F16FML \
    | AARCH64_FL_DOTPROD | AARCH64_FL_RCPC8_4)
+#define AARCH64_FL_FOR_ARCH8_5                 \
+  (AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_5)
 
 /* Macros to test ISA flags.  */
 
@@ -216,6 +221,7 @@ extern unsigned aarch64_architecture_version;
 #define AARCH64_ISA_SHA3          (aarch64_isa_flags & AARCH64_FL_SHA3)
 #define AARCH64_ISA_F16FML        (aarch64_isa_flags & AARCH64_FL_F16FML)
 #define AARCH64_ISA_RCPC8_4       (aarch64_isa_flags & AARCH64_FL_RCPC8_4)
+#define AARCH64_ISA_V8_5          (aarch64_isa_flags & AARCH64_FL_V8_5)
 
 /* Crypto is an optional extension to AdvSIMD.  */
 #define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO)
index f716431c4effe273b1196c4cc132b3cc99011c4f..f2d11e807e2ab4b453d7aefee74fb346670459f8 100644 (file)
@@ -15628,8 +15628,11 @@ more feature modifiers.  This option has the form
 @option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}.
 
 The permissible values for @var{arch} are @samp{armv8-a},
-@samp{armv8.1-a}, @samp{armv8.2-a}, @samp{armv8.3-a} or @samp{armv8.4-a}
-or @var{native}.
+@samp{armv8.1-a}, @samp{armv8.2-a}, @samp{armv8.3-a}, @samp{armv8.4-a},
+@samp{armv8.5-a} or @var{native}.
+
+The value @samp{armv8.5-a} implies @samp{armv8.4-a} and enables compiler
+support for the ARMv8.5-A architecture extensions.
 
 The value @samp{armv8.4-a} implies @samp{armv8.3-a} and enables compiler
 support for the ARMv8.4-A architecture extensions.