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authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 27 Oct 2023 10:27:30 +0000 (11:27 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 29 Oct 2023 08:54:37 +0000 (08:54 +0000)
also use explicit "the contents of register RA

openpower/isa/fixedloadshift.mdwn patch | blob | history

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index 897ec05267137a23c8e66d76c303ceb6dac8d978..57a0c66189a52c853c9b1cce7271161cc8065a1f 100644 (file)
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -65,10 +65,10 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1), and (RA).
+    register RB shifted by (SH+1), and the contents of register RA.
 
-    The byte in storage addressed by EA is
-    loaded into RT[56:63] . RT[0:55] are set to 0.
+    The byte in storage addressed by EA is loaded into RT[56:63].
+    RT[0:55] are set to 0.
 
     EA is placed into register RA.