int (*fence_export_sync_file)(struct radeon_winsys *ws,
struct pipe_fence_handle *fence);
+ /**
+ * Return a sync file FD that is already signalled.
+ */
+ int (*export_signalled_sync_file)(struct radeon_winsys *ws);
+
/**
* Initialize surface
*
/* If we don't have FDs at this point, it means we don't have fences
* either. */
+ if (sdma_fd == -1 && gfx_fd == -1)
+ return ws->export_signalled_sync_file(ws);
if (sdma_fd == -1)
return gfx_fd;
if (gfx_fd == -1)
return fd;
}
+static int amdgpu_export_signalled_sync_file(struct radeon_winsys *rws)
+{
+ struct amdgpu_winsys *ws = amdgpu_winsys(rws);
+ uint32_t syncobj;
+ int fd = -1;
+
+ int r = amdgpu_cs_create_syncobj2(ws->dev, DRM_SYNCOBJ_CREATE_SIGNALED,
+ &syncobj);
+ if (r) {
+ return -1;
+ }
+
+ r = amdgpu_cs_syncobj_export_sync_file(ws->dev, syncobj, &fd);
+ if (r) {
+ fd = -1;
+ }
+
+ amdgpu_cs_destroy_syncobj(ws->dev, syncobj);
+ return fd;
+}
+
static void amdgpu_fence_submitted(struct pipe_fence_handle *fence,
uint64_t seq_no,
uint64_t *user_fence_cpu_address)
ws->base.fence_reference = amdgpu_fence_reference;
ws->base.fence_import_sync_file = amdgpu_fence_import_sync_file;
ws->base.fence_export_sync_file = amdgpu_fence_export_sync_file;
+ ws->base.export_signalled_sync_file = amdgpu_export_signalled_sync_file;
}