cpus = [ DerivO3CPU(cpu_id=i) for i in xrange(nb_cores) ]
import ruby_config
-ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", nb_cores)
+ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", nb_cores)
# system simulated
system = System(cpu = cpus, physmem = ruby_memory, membus = Bus())
import ruby_config
-ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", 1)
+ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", 1)
cpu = DerivO3CPU(cpu_id=0)
cpu.clock = '2GHz'
cpus = [ AtomicSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ]
import ruby_config
-ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", nb_cores)
+ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", nb_cores)
# system simulated
system = System(cpu = cpus, physmem = ruby_memory, membus = Bus())
from m5.objects import *
import ruby_config
-ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", 1)
+ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", 1)
system = System(cpu = AtomicSimpleCPU(cpu_id=0),
physmem = ruby_memory,
cpus = [ TimingSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ]
import ruby_config
-ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", nb_cores)
+ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", nb_cores)
# system simulated
system = System(cpu = cpus, physmem = ruby_memory, membus = Bus())
from m5.objects import *
import ruby_config
-ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", 1)
+ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", 1)
cpu = TimingSimpleCPU(cpu_id=0)
system = System(cpu = cpu,