x86: implements the simd128 ADDSUBPD instruction
authorMaxime Martinasso <maxime.cscs@gmail.com>
Sat, 3 Jan 2015 23:51:48 +0000 (17:51 -0600)
committerMaxime Martinasso <maxime.cscs@gmail.com>
Sat, 3 Jan 2015 23:51:48 +0000 (17:51 -0600)
This patch implements the simd128 ADDSUBPD instruction for the x86 architecture.

Tested with a simple program in assembly language which executes the
instruction.  Checked that different versions of the instruction are executed
by using the execution tracing option.

Committed by: Nilay Vaish <nilay@cs.wisc.edu

src/arch/x86/isa/decoder/two_byte_opcodes.isa
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/simultaneous_addition_and_subtraction.py

index e1b20feb1244f03b84183594a34d1cbdb2b3cd85..dfc328c4b0dcb3af88e3c6d0f1b21bd6564597c7 100644 (file)
                 }
                 // operand size (0x66)
                 0x1: decode OPCODE_OP_BOTTOM3 {
-                    0x0: WarnUnimpl::addsubpd_Vo_Wo();
+                    0x0: ADDSUBPD(Vo,Wo);
                     0x1: PSRLW(Vo,Wo);
                     0x2: PSRLD(Vo,Wo);
                     0x3: PSRLQ(Vo,Wo);
index 2e9aebfdc21de4e92d75db22d7fd2001b5a96cfc..00b191ecaf841ed9bc55ade6300a1ce620c8f87e 100644 (file)
 
 microcode = '''
 # ADDSUBPS
-# ADDSUBPD
+
+def macroop ADDSUBPD_XMM_XMM {
+    msubf xmml, xmml, xmmlm, size=8, ext=Scalar
+    maddf xmmh, xmmh, xmmhm, size=8, ext=Scalar
+};
+
+def macroop ADDSUBPD_XMM_M {
+    ldfp ufp1, seg, sib, disp, dataSize=8
+    ldfp ufp2, seg, sib, "DISPLACEMENT+8", dataSize=8
+    msubf xmmlm, xmml, ufp1, size=8, ext=0
+    maddf xmmhm, xmmh, ufp2, size=8, ext=0
+};
+
+def macroop ADDSUBPD_XMM_P {
+    rdip t7
+    ldfp ufp1, seg, sib, disp, dataSize=8
+    ldfp ufp2, seg, sib, "DISPLACEMENT+8", dataSize=8
+    msubf xmmlm, xmml, ufp1, size=8, ext=0
+    maddf xmmhm, xmmh, ufp2, size=8, ext=0
+};
 '''