gallium: add PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER{S,_BUFFERS}

This moves the evergreen-specific max-sizes out as a driver-cap, so
other drivers with less strict requirements also can use hw-atomics.

Remove ssbo_atomic as it's no longer needed.

We should now be able to use hw-atomics for some stages and not for
other, if needed.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>

diff --git a/src/gallium/auxiliary/util/u_screen.c b/src/gallium/auxiliary/util/u_screen.c
index 7a37fe78468c94808219592273090ac5714764ce..c41e28820b21f199edef5298a90d90fa96804642 100644 (file)
--- a/src/gallium/auxiliary/util/u_screen.c
+++ b/src/gallium/auxiliary/util/u_screen.c
@@ -305,6 +305,8 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
    case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
+   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
+   case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
       return 0;
 
    case PIPE_CAP_MAX_GS_INVOCATIONS:

diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
index d589bad30efe637d9799510b77c7dfa88e1fd709..93415a5df1a875df23eefe99e520f4d5e9281220 100644 (file)
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -461,6 +461,11 @@ subpixel precision bias in bits during conservative rasterization.
 * ``PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS``: Maximum total number of shader
   buffers. A value of 0 means the sum of all per-shader stage maximums (see
   ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``).
+* ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS``: Maximum total number of atomic
+  counters. A value of 0 means the default value (MAX_ATOMIC_COUNTERS = 4096).
+* ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS``: Maximum total number of
+  atomic counter buffers. A value of 0 means the sum of all per-shader stage
+  maximums (see ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``).
 
 .. _pipe_capf:
 

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index f1e80a8f827a8e3a5c4bf1ecaa4554db34a8043b..e10704bfc17ba6498277a716377e8b4cd2814001 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -549,6 +549,16 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                return rscreen->b.info.pci_dev;
        case PIPE_CAP_PCI_FUNCTION:
                return rscreen->b.info.pci_func;
+
+       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
+               if (rscreen->b.family >= CHIP_CEDAR && rscreen->has_atomics)
+                       return 8;
+               return 0;
+       case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
+               if (rscreen->b.family >= CHIP_CEDAR && rscreen->has_atomics)
+                       return EG_MAX_ATOMIC_BUFFERS;
+               return 0;
+
        default:
                return u_pipe_screen_get_param_defaults(pscreen, param);
        }

diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
index b7c7d8fcbd5271668023c299ab5bc66f036bd88b..bdd3f4680f61554a2b03d298bed08e3ad636c09d 100644 (file)
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -819,6 +819,8 @@ enum pipe_cap
    PIPE_CAP_MAX_SHADER_BUFFER_SIZE,
    PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE,
    PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS,
+   PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS,
+   PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS,
 };
 
 /**

diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c
index 0fc13d0dd24e322e4f991325146f75648446246e..244c12595ec6ca64050b05ae26b7f99e3002b8f7 100644 (file)
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -83,7 +83,6 @@ void st_init_limits(struct pipe_screen *screen,
    unsigned sh;
    bool can_ubo = true;
    int temp;
-   bool ssbo_atomic = true;
 
    c->MaxTextureLevels
       = _min(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
@@ -251,7 +250,6 @@ void st_init_limits(struct pipe_screen *screen,
           * for separate atomic counters get the actual hw limits
           * per stage on atomic counters and buffers
           */
-         ssbo_atomic = false;
          pc->MaxAtomicCounters = temp;
          pc->MaxAtomicBuffers = screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS);
       } else {
@@ -445,13 +443,11 @@ void st_init_limits(struct pipe_screen *screen,
    c->MaxAtomicBufferSize =
       c->Program[MESA_SHADER_FRAGMENT].MaxAtomicCounters * ATOMIC_COUNTER_SIZE;
 
-   if (!ssbo_atomic) {
-      /* on all HW with separate atomic (evergreen) the following
-         lines are true. not sure it's worth adding CAPs for this at this
-         stage. */
-      c->MaxCombinedAtomicCounters = c->Program[MESA_SHADER_FRAGMENT].MaxAtomicCounters;
-      c->MaxCombinedAtomicBuffers = c->Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers;
-   } else {
+   c->MaxCombinedAtomicBuffers =
+      MIN2(screen->get_param(screen,
+                             PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS),
+           MAX_COMBINED_ATOMIC_BUFFERS);
+   if (!c->MaxCombinedAtomicBuffers) {
       c->MaxCombinedAtomicBuffers =
          c->Program[MESA_SHADER_VERTEX].MaxAtomicBuffers +
          c->Program[MESA_SHADER_TESS_CTRL].MaxAtomicBuffers +
@@ -461,6 +457,11 @@ void st_init_limits(struct pipe_screen *screen,
       assert(c->MaxCombinedAtomicBuffers <= MAX_COMBINED_ATOMIC_BUFFERS);
    }
 
+   c->MaxCombinedAtomicCounters =
+      screen->get_param(screen, PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS);
+   if (!c->MaxCombinedAtomicCounters)
+      c->MaxCombinedAtomicCounters = MAX_ATOMIC_COUNTERS;
+
    if (c->MaxCombinedAtomicBuffers > 0) {
       extensions->ARB_shader_atomic_counters = GL_TRUE;
       extensions->ARB_shader_atomic_counter_ops = GL_TRUE;