fd6_ctx->magic.RB_CCU_CNTL_bypass = A6XX_RB_CCU_CNTL_OFFSET(0x20000);
fd6_ctx->magic.PC_UNKNOWN_9805 = 0x1;
fd6_ctx->magic.SP_UNKNOWN_A0F8 = 0x1;
+ case 650:
+ fd6_ctx->magic.RB_UNKNOWN_8E04_blit = 0x04100000;
+ fd6_ctx->magic.RB_CCU_CNTL_gmem = A6XX_RB_CCU_CNTL_OFFSET(0x114000) |
+ A6XX_RB_CCU_CNTL_GMEM;
+ fd6_ctx->magic.RB_CCU_CNTL_bypass = A6XX_RB_CCU_CNTL_OFFSET(0x30000);
+ fd6_ctx->magic.PC_UNKNOWN_9805 = 0x2;
+ fd6_ctx->magic.SP_UNKNOWN_A0F8 = 0x2;
break;
default:
unreachable("missing magic config");
static unsigned
div_align(unsigned num, unsigned denom, unsigned al)
{
- return align(DIV_ROUND_UP(num, denom), al);
+ return util_align_npot(DIV_ROUND_UP(num, denom), al);
}
static bool
for (i = 0; i < MAX_RENDER_TARGETS; i++) {
if (key->cbuf_cpp[i]) {
- gmem->cbuf_base[i] = align(total, gmem_align);
+ gmem->cbuf_base[i] = util_align_npot(total, gmem_align);
total = gmem->cbuf_base[i] + key->cbuf_cpp[i] * bin_w * bin_h;
}
}
if (key->zsbuf_cpp[0]) {
- gmem->zsbuf_base[0] = align(total, gmem_align);
+ gmem->zsbuf_base[0] = util_align_npot(total, gmem_align);
total = gmem->zsbuf_base[0] + key->zsbuf_cpp[0] * bin_w * bin_h;
}
if (key->zsbuf_cpp[1]) {
- gmem->zsbuf_base[1] = align(total, gmem_align);
+ gmem->zsbuf_base[1] = util_align_npot(total, gmem_align);
total = gmem->zsbuf_base[1] + key->zsbuf_cpp[1] * bin_w * bin_h;
}
*/
key->gmem_page_align = 8;
} else if (is_a6xx(screen)) {
- key->gmem_page_align = 1;
+ key->gmem_page_align = is_a650(screen) ? 3 : 1;
} else {
// TODO re-check this across gens.. maybe it should only
// be a single page in some cases:
case 618:
case 630:
case 640:
+ case 650:
fd6_screen_init(pscreen);
break;
default:
if (screen->gpu_id >= 600) {
screen->gmem_alignw = 16;
screen->gmem_alignh = 4;
- screen->tile_alignw = 32;
+ screen->tile_alignw = is_a650(screen) ? 96 : 32;
screen->tile_alignh = 32;
screen->num_vsc_pipes = 32;
} else if (screen->gpu_id >= 500) {
return (screen->gpu_id >= 600) && (screen->gpu_id < 700);
}
+static inline boolean
+is_a650(struct fd_screen *screen)
+{
+ return screen->gpu_id == 650;
+}
+
/* is it using the ir3 compiler (shader isa introduced with a3xx)? */
static inline boolean
is_ir3(struct fd_screen *screen)