+2003-04-06 Chris Demetriou <cgd@broadcom.com>
+
+ * config/tc-mips.c (HAVE_64BIT_ADDRESS_CONSTANTS): New.
+ (macro): Use new macro to decide whether to emit constant address
+ as 32 or 64 bits if addresses are 32-bit wide but registers are
+ 64-bit wide.
+
2003-04-05 Stephane Carrez <stcarrez@nerim.fr>
* config/tc-m68hc11.c (M6811_OP_CALL_ADDR): New internal define.
&& mips_pic != EMBEDDED_PIC))
#define HAVE_64BIT_ADDRESSES (! HAVE_32BIT_ADDRESSES)
+#define HAVE_64BIT_ADDRESS_CONSTANTS (HAVE_64BIT_ADDRESSES \
+ || HAVE_64BIT_GPRS)
/* Return true if the given CPU supports the MIPS16 ASE. */
#define CPU_HAS_MIPS16(cpu) \
probably attempt to generate 64-bit constants more
efficiently in general.
*/
- if (HAVE_64BIT_ADDRESSES
- && !(offset_expr.X_op == O_constant
- && IS_SEXT_32BIT_NUM (offset_expr.X_add_number + 0x8000)))
+ if ((offset_expr.X_op != O_constant && HAVE_64BIT_ADDRESSES)
+ || (offset_expr.X_op == O_constant
+ && !IS_SEXT_32BIT_NUM (offset_expr.X_add_number)
+ && HAVE_64BIT_ADDRESS_CONSTANTS))
{
p = NULL;
return;
}
+ else if (offset_expr.X_op == O_constant
+ && !IS_SEXT_32BIT_NUM (offset_expr.X_add_number))
+ as_bad (_("load/store address overflow (max 32 bits)"));
if (breg == 0)
{