pan/midgard: Disassemble load/store barrel shift

Arm assembly intensifies.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

diff --git a/src/panfrost/midgard/disassemble.c b/src/panfrost/midgard/disassemble.c
index d83855aef318bc945c8d370f13e09aa1d559f26d..6f4ea4869151aefd4666f46d54d698ee6270466f 100644 (file)
--- a/src/panfrost/midgard/disassemble.c
+++ b/src/panfrost/midgard/disassemble.c
@@ -969,16 +969,34 @@ is_op_varying(unsigned op)
 }
 
 static void
-print_load_store_arg(uint8_t arg)
+print_load_store_arg(uint8_t arg, unsigned index)
 {
         /* Try to interpret as a register */
         midgard_ldst_register_select sel;
         memcpy(&sel, &arg, sizeof(arg));
 
+        /* If unknown is set, we're not sure what this is or how to
+         * interpret it. But if it's zero, we get it. */
+
+        if (sel.unknown) {
+                printf("0x%02X", arg);
+                return;
+        }
+
         unsigned reg = REGISTER_LDST_BASE + sel.select;
         char comp = components[sel.component];
 
-        printf("r%d.%c /* 0x%X */", reg, comp, arg);
+        printf("r%d.%c", reg, comp);
+
+        /* Only print a shift if it's non-zero. Shifts only make sense for the
+         * second index. For the first, we're not sure what it means yet */
+
+        if (index == 1) {
+                if (sel.shift)
+                        printf(" << %d", sel.shift);
+        } else {
+                printf(" /* %X */", sel.shift);
+        }
 }
 
 static void
@@ -1012,9 +1030,9 @@ print_load_store_instr(uint64_t data,
         print_swizzle_vec4(word->swizzle, false, false);
 
         printf(", ");
-        print_load_store_arg(word->arg_1);
+        print_load_store_arg(word->arg_1, 0);
         printf(", ");
-        print_load_store_arg(word->arg_2);
+        print_load_store_arg(word->arg_2, 1);
         printf(" /* %X */\n", word->varying_parameters);
 }
 

diff --git a/src/panfrost/midgard/midgard.h b/src/panfrost/midgard/midgard.h
index 41b57a108a0e99532d2e729eb32f7454d1883840..ba7d421e567084813b94845b13960bc3937c42c8 100644 (file)
--- a/src/panfrost/midgard/midgard.h
+++ b/src/panfrost/midgard/midgard.h
@@ -508,7 +508,14 @@ __attribute__((__packed__))
         /* Register select between r26/r27 */
         unsigned select : 1;
 
-        unsigned unknown : 5;
+        unsigned unknown : 2;
+
+        /* Like any good Arm instruction set, load/store arguments can be
+         * implicitly left-shifted... but only the second argument. Zero for no
+         * shifting, up to <<7 possible though. This is useful for indexing.
+         *
+         * For the first argument, it's unknown what these bits mean */
+        unsigned shift : 3;
 }
 midgard_ldst_register_select;