r600/sfn: Add compute shader skeleton
authorGert Wollny <gert.wollny@collabora.com>
Fri, 27 Dec 2019 16:49:27 +0000 (17:49 +0100)
committerMarge Bot <eric+marge@anholt.net>
Mon, 10 Feb 2020 19:09:08 +0000 (19:09 +0000)
This adds some very basic compute shader support.

v2: fix compilation with gcc-6

v3: rebase: correct barrier intrinstic

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>

src/gallium/drivers/r600/Makefile.sources
src/gallium/drivers/r600/meson.build
src/gallium/drivers/r600/sfn/sfn_ir_to_assembly.cpp
src/gallium/drivers/r600/sfn/sfn_nir.cpp
src/gallium/drivers/r600/sfn/sfn_shader_base.cpp
src/gallium/drivers/r600/sfn/sfn_shader_compute.cpp [new file with mode: 0644]
src/gallium/drivers/r600/sfn/sfn_shader_compute.h [new file with mode: 0644]

index f16bce16113ad174e3e8af8e4c1c38722f94e5f1..f5cf78110a4d2c157e3af5c703e9cd0b5730e5fc 100644 (file)
@@ -129,6 +129,8 @@ CXX_SOURCES = \
        sfn/sfn_nir_vectorize_vs_inputs.c \
        sfn/sfn_shader_base.cpp \
        sfn/sfn_shader_base.h \
+       sfn/sfn_shader_compute.cpp \
+       sfn/sfn_shader_compute.h \
        sfn/sfn_shader_fragment.cpp \
        sfn/sfn_shader_fragment.h \
        sfn/sfn_shader_geometry.cpp \
index 3a4cf25a0981f1d8a5ab65788a85b147a7ad24d6..3f85127d9cc0093ab26f4432df3cba3b89cd61fb 100644 (file)
@@ -146,6 +146,8 @@ files_r600 = files(
   'sfn/sfn_nir_vectorize_vs_inputs.c',
   'sfn/sfn_shader_base.cpp',
   'sfn/sfn_shader_base.h',
+  'sfn/sfn_shader_compute.cpp',
+  'sfn/sfn_shader_compute.h',
   'sfn/sfn_shader_fragment.cpp',
   'sfn/sfn_shader_fragment.h',
   'sfn/sfn_shader_geometry.cpp',
index a26054397d8354aac4621b3422f70d0346c7126c..4909ad498d8d675902c76f5a658f705ab1c98287 100644 (file)
@@ -69,6 +69,8 @@ private:
    bool copy_dst(r600_bytecode_alu_dst& dst, const Value& src);
    bool copy_src(r600_bytecode_alu_src& src, const Value& s);
 
+
+
    ConditionalJumpTracker m_jump_tracker;
    CallStack m_callstack;
 
index 845bb6c3b368574ede1499f49f14f496e36ae049..206435528a624da8203976f8aa2a668b8fcb4fbf 100644 (file)
@@ -35,6 +35,7 @@
 #include "sfn_shader_vertex.h"
 #include "sfn_shader_fragment.h"
 #include "sfn_shader_geometry.h"
+#include "sfn_shader_compute.h"
 #include "sfn_nir_lower_fs_out_to_vector.h"
 #include "sfn_ir_to_assembly.h"
 
@@ -78,6 +79,10 @@ bool ShaderFromNir::lower(const nir_shader *shader, r600_pipe_shader *pipe_shade
       sfn_log << SfnLog::trans << "Start FS\n";
       impl.reset(new FragmentShaderFromNir(*shader, pipe_shader->shader, *sel, key));
       break;
+   case MESA_SHADER_COMPUTE:
+      sfn_log << SfnLog::trans << "Start CS\n";
+      impl.reset(new ComputeShaderFromNir(pipe_shader, *sel, key));
+      break;
    default:
       return false;
    }
index 6da9a8035c22b9e887b7bd6b879d5936c55b0ea5..96c8e804e2b56164e9a56fb6a94cec7d2c4eeb16 100644 (file)
@@ -28,6 +28,7 @@
 #include "../r600_shader.h"
 #include "sfn_shader_vertex.h"
 
+#include "sfn_shader_compute.h"
 #include "sfn_shader_fragment.h"
 #include "sfn_shader_geometry.h"
 #include "sfn_liverange.h"
diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_compute.cpp b/src/gallium/drivers/r600/sfn/sfn_shader_compute.cpp
new file mode 100644 (file)
index 0000000..6f43533
--- /dev/null
@@ -0,0 +1,145 @@
+/* -*- mesa-c++  -*-
+ *
+ * Copyright (c) 2018 Collabora LTD
+ *
+ * Author: Gert Wollny <gert.wollny@collabora.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "sfn_shader_compute.h"
+#include "sfn_instruction_fetch.h"
+
+namespace r600 {
+
+ComputeShaderFromNir::ComputeShaderFromNir(r600_pipe_shader *sh,
+                                           r600_pipe_shader_selector& sel,
+                                           UNUSED const r600_shader_key& key):
+     ShaderFromNirProcessor (PIPE_SHADER_COMPUTE, sel, sh->shader,
+                             sh->scratch_space_needed),
+     m_reserved_registers(0)
+{
+}
+
+bool ComputeShaderFromNir::scan_sysvalue_access(UNUSED nir_instr *instr)
+{
+   return true;
+}
+bool ComputeShaderFromNir::allocate_reserved_registers()
+{
+   int thread_id_sel = m_reserved_registers++;
+   int wg_id_sel = m_reserved_registers++;
+
+   for (int i = 0; i < 3; ++i) {
+      auto tmp = new GPRValue(thread_id_sel, i);
+      tmp->set_as_input();
+      m_local_invocation_id[i] = PValue(tmp);
+      inject_register(tmp->sel(), i, m_local_invocation_id[i], false);
+
+      tmp = new GPRValue(wg_id_sel, i);
+      tmp->set_as_input();
+      m_workgroup_id[i] = PValue(tmp);
+      inject_register(tmp->sel(), i, m_workgroup_id[i], false);
+   }
+   return true;
+}
+
+bool ComputeShaderFromNir::emit_intrinsic_instruction_override(nir_intrinsic_instr* instr)
+{
+   switch (instr->intrinsic) {
+   case nir_intrinsic_load_local_invocation_id:
+      return emit_load_3vec(instr, m_local_invocation_id);
+   case nir_intrinsic_load_work_group_id:
+      return emit_load_3vec(instr, m_workgroup_id);
+   case nir_intrinsic_load_num_work_groups:
+      return emit_load_num_work_groups(instr);
+   case nir_intrinsic_control_barrier:
+      return emit_barrier(instr);
+   default:
+      return false;
+   }
+}
+
+bool ComputeShaderFromNir::emit_load_3vec(nir_intrinsic_instr* instr,
+                                          const std::array<PValue,3>& src)
+{
+   AluInstruction *ir = nullptr;
+   for (int i = 0; i < 3; ++i) {
+      ir = new AluInstruction(op1_mov, from_nir(instr->dest, i), src[i], {alu_write});
+      emit_instruction(ir);
+   }
+   ir->set_flag(alu_last_instr);
+   return true;
+}
+
+bool ComputeShaderFromNir::emit_barrier(UNUSED nir_intrinsic_instr* instr)
+{
+   AluInstruction *ir = new AluInstruction(op0_group_barrier);
+   ir->set_flag(alu_last_instr);
+   emit_instruction(ir);
+   return true;
+}
+
+bool ComputeShaderFromNir::emit_load_num_work_groups(nir_intrinsic_instr* instr)
+{
+   int temp = allocate_temp_register();
+   PValue a_zero(new GPRValue(temp, 1));
+   emit_instruction(new AluInstruction(op1_mov, a_zero, Value::zero, EmitInstruction::last_write));
+   GPRVector dest;
+   for (int i = 0; i < 3; ++i)
+      dest.set_reg_i(i, from_nir(instr->dest, i));
+   dest.set_reg_i(3, from_nir(instr->dest, 7));
+
+   auto ir = new FetchInstruction(vc_fetch, no_index_offset,
+                                  fmt_32_32_32_32, vtx_nf_int, vtx_es_none, a_zero, dest, 16,
+                                  false, 16, R600_BUFFER_INFO_CONST_BUFFER, 0,
+                                  bim_none, false, false, 0, 0, 0, PValue(), {0,1,2,7});
+   ir->set_flag(vtx_srf_mode);
+   emit_instruction(ir);
+   return true;
+}
+
+bool ComputeShaderFromNir::do_process_inputs(UNUSED nir_variable *input)
+{
+   return true;
+}
+
+bool ComputeShaderFromNir::do_process_outputs(UNUSED nir_variable *output)
+{
+   return true;
+}
+
+bool ComputeShaderFromNir::do_emit_load_deref(UNUSED const nir_variable *in_var,
+                                              UNUSED nir_intrinsic_instr* instr)
+{
+   return true;
+}
+
+bool ComputeShaderFromNir::do_emit_store_deref(UNUSED const nir_variable *out_var,
+                                               UNUSED nir_intrinsic_instr* instr)
+{
+   return true;
+}
+void ComputeShaderFromNir::do_finalize()
+{
+
+}
+
+}
diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_compute.h b/src/gallium/drivers/r600/sfn/sfn_shader_compute.h
new file mode 100644 (file)
index 0000000..db36776
--- /dev/null
@@ -0,0 +1,66 @@
+/* -*- mesa-c++  -*-
+ *
+ * Copyright (c) 2019 Collabora LTD
+ *
+ * Author: Gert Wollny <gert.wollny@collabora.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef SFN_COMPUTE_SHADER_FROM_NIR_H
+#define SFN_COMPUTE_SHADER_FROM_NIR_H
+
+#include "sfn_shader_base.h"
+#include "sfn_shaderio.h"
+#include <bitset>
+
+namespace r600 {
+
+class ComputeShaderFromNir : public ShaderFromNirProcessor
+{
+public:
+   ComputeShaderFromNir(r600_pipe_shader *sh,
+                        r600_pipe_shader_selector& sel,
+                        const r600_shader_key &key);
+
+   bool scan_sysvalue_access(nir_instr *instr) override;
+
+private:
+   bool emit_intrinsic_instruction_override(nir_intrinsic_instr* instr) override;
+
+   bool allocate_reserved_registers() override;
+   bool do_process_inputs(nir_variable *input) override;
+   bool do_process_outputs(nir_variable *output) override;
+   bool do_emit_load_deref(const nir_variable *in_var, nir_intrinsic_instr* instr) override;
+   bool do_emit_store_deref(const nir_variable *out_var, nir_intrinsic_instr* instr) override;
+   void do_finalize() override;
+
+   bool emit_load_3vec(nir_intrinsic_instr* instr, const std::array<PValue,3>& src);
+   bool emit_load_num_work_groups(nir_intrinsic_instr* instr);
+   bool emit_barrier(nir_intrinsic_instr* instr);
+
+   int m_reserved_registers;
+   std::array<PValue,3> m_workgroup_id;
+   std::array<PValue,3> m_local_invocation_id;
+};
+
+}
+
+#endif // SFN_COMPUTE_SHADER_FROM_NIR_H