.is_cannonlake = true,
};
+#define GEN11_HW_INFO \
+ .gen = 11, \
+ .has_pln = false, \
+ .max_vs_threads = 364, \
+ .max_gs_threads = 224, \
+ .max_tcs_threads = 224, \
+ .max_tes_threads = 364, \
+ .max_cs_threads = 56, \
+ .urb = { \
+ .size = 1024, \
+ .min_entries = { \
+ [MESA_SHADER_VERTEX] = 64, \
+ [MESA_SHADER_TESS_EVAL] = 34, \
+ }, \
+ .max_entries = { \
+ [MESA_SHADER_VERTEX] = 2384, \
+ [MESA_SHADER_TESS_CTRL] = 1032, \
+ [MESA_SHADER_TESS_EVAL] = 2384, \
+ [MESA_SHADER_GEOMETRY] = 1032, \
+ }, \
+ }
+
+#define GEN11_FEATURES(_gt, _slices, _subslices, _l3) \
+ GEN8_FEATURES, \
+ GEN11_HW_INFO, \
+ .gt = _gt, .num_slices = _slices, .l3_banks = _l3, \
+ .num_subslices = _subslices
+
+static const struct gen_device_info gen_device_info_icl_8x8 = {
+ GEN11_FEATURES(2, 1, subslices(8), 8),
+};
+
+static const struct gen_device_info gen_device_info_icl_6x8 = {
+ GEN11_FEATURES(1, 1, subslices(6), 6),
+};
+
+static const struct gen_device_info gen_device_info_icl_4x8 = {
+ GEN11_FEATURES(1, 1, subslices(4), 6),
+};
+
+static const struct gen_device_info gen_device_info_icl_1x8 = {
+ GEN11_FEATURES(1, 1, subslices(1), 6),
+};
+
bool
gen_get_device_info(int devid, struct gen_device_info *devinfo)
{
* Extra padding can be necessary depending how the thread IDs are
* calculated for a particular shader stage.
*/
- if (devinfo->gen >= 9) {
+
+ switch(devinfo->gen) {
+ case 9:
+ case 10:
devinfo->max_wm_threads = 64 /* threads-per-PSD */
* devinfo->num_slices
* 4; /* effective subslices per slice */
+ break;
+ case 11:
+ devinfo->max_wm_threads = 128 /* threads-per-PSD */
+ * devinfo->num_slices
+ * 8; /* subslices per slice */
+ break;
+ default:
+ break;
}
assert(devinfo->num_slices <= ARRAY_SIZE(devinfo->num_subslices));