i386. Extend static buffers. Fix SF mode operand constraint to `Yv' in storehpd pattern.

gcc/
        * gcc/config/i386/sse.md (define_insn "*andnot<mode>3"): Extend static
	array to 128 chars.
	(define_insn "*andnottf3"): Ditto.
	(define_insn "*<code><mode>3"/any_logic): Ditto.
	(define_insn "*<code>tf3"/any_logic): Ditto.
	(define_insn "sse2_storehpd"): Use Yv constraint for scalar
	operand to block AVX-512VL insn variant emit when it is not enabled.

From-SVN: r236364

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c5376a102a352fa2886df308805a68444670e6dd..4592bcccbdccfe086966b7aab9e239c2bd6c13e1 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2016-05-18  Kirill Yukhin  <kirill.yukhin@intel.com>
+
+        * gcc/config/i386/sse.md (define_insn "*andnot<mode>3"): Extend static
+       array to 128 chars.
+       (define_insn "*andnottf3"): Ditto.
+       (define_insn "*<code><mode>3"/any_logic): Ditto.
+       (define_insn "*<code>tf3"/any_logic): Ditto.
+       (define_insn "sse2_storehpd"): Use Yv constraint for scalar
+       operand to block AVX-512VL insn variant emit when it is not enabled.
+
 2016-05-18  Kirill Yukhin  <kirill.yukhin@intel.com>
 
        * config/i386/sse.md (define_insn "*vec_concatv2sf_sse4_1"): Use 'Yv'

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index a8492c7d61a3f05aad06d5cc0564d3b484db57bb..b0d3f81f43d67c48bca029ecdb5d1a8d6fa9eed4 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -3027,7 +3027,7 @@
            (match_operand:MODEF 2 "register_operand" "x,x,v,v")))]
   "SSE_FLOAT_MODE_P (<MODE>mode)"
 {
-  static char buf[32];
+  static char buf[128];
   const char *ops;
   const char *suffix
     = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "<ssevecmodesuffix>";
@@ -3094,7 +3094,7 @@
          (match_operand:TF 2 "vector_operand" "xBm,xm,vm,v")))]
   "TARGET_SSE"
 {
-  static char buf[32];
+  static char buf[128];
   const char *ops;
   const char *tmp
     = (which_alternative >= 2 ? "pandnq"
@@ -3150,7 +3150,7 @@
          (match_operand:MODEF 2 "register_operand" "x,x,v,v")))]
   "SSE_FLOAT_MODE_P (<MODE>mode)"
 {
-  static char buf[32];
+  static char buf[128];
   const char *ops;
   const char *suffix
     = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "<ssevecmodesuffix>";
@@ -3225,7 +3225,7 @@
   "TARGET_SSE
    && ix86_binary_operator_ok (<CODE>, TFmode, operands)"
 {
-  static char buf[32];
+  static char buf[128];
   const char *ops;
   const char *tmp
     = (which_alternative >= 2 ? "p<logic>q"
@@ -8426,9 +8426,9 @@
 ;; Avoid combining registers from different units in a single alternative,
 ;; see comment above inline_secondary_memory_needed function in i386.c
 (define_insn "sse2_storehpd"
-  [(set (match_operand:DF 0 "nonimmediate_operand"     "=m,x,v,x,*f,r")
+  [(set (match_operand:DF 0 "nonimmediate_operand"     "=m,x,Yv,x,*f,r")
        (vec_select:DF
-         (match_operand:V2DF 1 "nonimmediate_operand" " v,0,v,o,o,o")
+         (match_operand:V2DF 1 "nonimmediate_operand" " v,0, v,o,o,o")
          (parallel [(const_int 1)])))]
   "TARGET_SSE2 && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@