i915g: Make sure to map tiled buffers via the gtt
authorJakob Bornecrantz <wallbraker@gmail.com>
Wed, 23 Sep 2009 18:54:22 +0000 (11:54 -0700)
committerJakob Bornecrantz <wallbraker@gmail.com>
Sun, 27 Sep 2009 20:19:49 +0000 (13:19 -0700)
src/gallium/winsys/drm/intel/gem/intel_drm_api.c
src/gallium/winsys/drm/intel/gem/intel_drm_buffer.c

index 46fdc9f92b276e624db7251c1861494dd4105ae9..8b647a769b537fbb0a0fffe314e9b0e5840ad1d1 100644 (file)
@@ -41,6 +41,7 @@ intel_drm_buffer_from_handle(struct intel_drm_winsys *idws,
                              const char* name, unsigned handle)
 {
    struct intel_drm_buffer *buf = CALLOC_STRUCT(intel_drm_buffer);
+   uint32_t tile = 0, swizzle = 0;
 
    if (!buf)
       return NULL;
@@ -53,6 +54,10 @@ intel_drm_buffer_from_handle(struct intel_drm_winsys *idws,
    if (!buf->bo)
       goto err;
 
+   drm_intel_bo_get_tiling(buf->bo, &tile, &swizzle);
+   if (tile != INTEL_TILE_NONE)
+      buf->map_gtt = TRUE;
+
    return (struct intel_buffer *)buf;
 
 err:
index 0030f915a367282d139d60bf5b4236ec888c5241..327e19fcd68ed503763de5c5dff518211236ec03 100644 (file)
@@ -58,11 +58,17 @@ intel_drm_buffer_set_fence_reg(struct intel_winsys *iws,
                                unsigned stride,
                                enum intel_buffer_tile tile)
 {
+   struct intel_drm_buffer *buf = intel_drm_buffer(buffer);
    assert(I915_TILING_NONE == INTEL_TILE_NONE);
    assert(I915_TILING_X == INTEL_TILE_X);
    assert(I915_TILING_Y == INTEL_TILE_Y);
 
-   return drm_intel_bo_set_tiling(intel_bo(buffer), &tile, stride);
+   if (tile != INTEL_TILE_NONE) {
+      assert(buf->map_count == 0);
+      buf->map_gtt = TRUE;
+   }
+
+   return drm_intel_bo_set_tiling(buf->bo, &tile, stride);
 }
 
 static void *