Commit files missed in revision 240541.

From-SVN: r240542

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 411754f23e9017d1e85fbd27733fa81cb2d0b6f0..999292baeab1ee0d07569a63a7eb1b63a2cff7f2 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -6065,6 +6065,7 @@
   [(set_attr "type" "mov_reg,mov_imm,mvn_imm,mov_imm,load1,store1")
    (set_attr "predicable" "yes")
    (set_attr "pool_range" "*,*,*,*,4096,*")
+   (set_attr "arch" "*,*,*,t2,*,*")
    (set_attr "neg_pool_range" "*,*,*,*,4084,*")]
 )
 

diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index 5d22c341313cb0d96e66e85265f9b8f5faae24a3..21eaf486ddb13ee28773a41e2c40812a1842b712 100644 (file)
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -65,6 +65,7 @@
     (const_string "f_mcr")
     (const_string "f_mrc")
     (const_string "fmov")])
+  (set_attr "arch" "*, *, t2, *, *, *, *, *")
   (set_attr "pool_range" "*, *, *, *, 256, *, *, *")
   (set_attr "neg_pool_range" "*, *, *, *, 244, *, *, *")
   (set_attr "length" "4")]
@@ -108,6 +109,7 @@
   (set_attr "type"
    "mov_reg, mov_imm, mov_imm, mov_imm, store1, load1,\
     f_mcr, f_mrc, fmov")
+  (set_attr "arch" "*, *, *, t2, *, *, *, *, *")
   (set_attr "pool_range" "*, *, *, *, *, 4094, *, *, *")
   (set_attr "neg_pool_range" "*, *, *, *, *, 250, *, *, *")
   (set_attr "length" "2, 4, 2, 4, 4, 4, 4, 4, 4")]
@@ -139,14 +141,14 @@
       return "ldrh%?\t%0, %1\t%@ movhi";
     case 5:
     case 6:
-      return "vmov%?.f16\t%0, %1\t%@ int";
+      return "vmov.f16\t%0, %1\t%@ int";
     case 7:
       return "vmov%?.f32\t%0, %1\t%@ int";
     default:
       gcc_unreachable ();
     }
 }
- [(set_attr "predicable" "yes")
+ [(set_attr "predicable" "yes, yes, yes, yes, yes, no, no, yes")
   (set_attr_alternative "type"
    [(if_then_else
      (match_operand 1 "const_int_operand" "")
@@ -159,6 +161,7 @@
     (const_string "f_mcr")
     (const_string "f_mrc")
     (const_string "fmov")])
+  (set_attr "arch" "*, *, t2, *, *, *, *, *")
   (set_attr "pool_range" "*, *, *, *, 256, *, *, *")
   (set_attr "neg_pool_range" "*, *, *, *, 244, *, *, *")
   (set_attr "length" "4")]
@@ -188,19 +191,21 @@
       return "ldrh%?\t%0, %1\t%@ movhi";
     case 6:
     case 7:
-      return "vmov%?.f16\t%0, %1\t%@ int";
+      return "vmov.f16\t%0, %1\t%@ int";
     case 8:
       return "vmov%?.f32\t%0, %1\t%@ int";
     default:
       gcc_unreachable ();
     }
 }
- [(set_attr "predicable" "yes")
+ [(set_attr "predicable"
+   "yes, yes, yes, yes, yes, yes, no, no, yes")
   (set_attr "predicable_short_it"
    "yes, no, yes, no, no, no, no, no, no")
   (set_attr "type"
    "mov_reg, mov_imm, mov_imm, mov_imm, store1, load1,\
     f_mcr, f_mrc, fmov")
+  (set_attr "arch" "*, *, *, t2, *, *, *, *, *")
   (set_attr "pool_range" "*, *, *, *, *, 4094, *, *, *")
   (set_attr "neg_pool_range" "*, *, *, *, *, 250, *, *, *")
   (set_attr "length" "2, 4, 2, 4, 4, 4, 4, 4, 4")]
@@ -241,7 +246,9 @@
     }
   "
   [(set_attr "predicable" "yes")
-   (set_attr "type" "mov_reg,mov_reg,mvn_imm,mov_imm,load1,store1,f_mcr,f_mrc,fmov,f_loads,f_stores")
+   (set_attr "type" "mov_reg,mov_reg,mvn_imm,mov_imm,load1,store1,
+                    f_mcr,f_mrc,fmov,f_loads,f_stores")
+   (set_attr "arch" "*,*,*,t2,*,*,*,*,*,*,*")
    (set_attr "pool_range"     "*,*,*,*,4096,*,*,*,*,1020,*")
    (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")]
 )
@@ -290,6 +297,7 @@
    (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no,no,no,no,no,no,no,no")
    (set_attr "type" "mov_reg,mov_reg,mov_reg,mvn_reg,mov_imm,load1,load1,store1,store1,f_mcr,f_mrc,fmov,f_loads,f_stores")
    (set_attr "length" "2,4,2,4,4,4,4,4,4,4,4,4,4,4")
+   (set_attr "arch" "*,*,*,*,t2,*,*,*,*,*,*,*,*,*")
    (set_attr "pool_range"     "*,*,*,*,*,1018,4094,*,*,*,*,*,1018,*")
    (set_attr "neg_pool_range" "*,*,*,*,*,   0,   0,*,*,*,*,*,1008,*")]
 )