freedreno/a4xx: XA gpu hang at startup
authorRob Clark <robclark@freedesktop.org>
Sat, 6 Dec 2014 17:39:19 +0000 (12:39 -0500)
committerRob Clark <robclark@freedesktop.org>
Tue, 9 Dec 2014 23:02:45 +0000 (18:02 -0500)
Signed-off-by: Rob Clark <robclark@freedesktop.org>
src/gallium/drivers/freedreno/a4xx/fd4_emit.c
src/gallium/drivers/freedreno/a4xx/fd4_gmem.c

index 5b471584ee067ea716fa837accb097bed70768fd..839d3e8e4412716b152823f7ac3c4ad22a42711e 100644 (file)
@@ -689,5 +689,11 @@ fd4_emit_restore(struct fd_context *ctx)
        OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL3, 1);
        OUT_RING(ring, A4XX_RB_RENDER_CONTROL3_COMPONENT_ENABLE(0xf));
 
+       OUT_PKT0(ring, REG_A4XX_GRAS_CLEAR_CNTL, 1);
+       OUT_RING(ring, A4XX_GRAS_CLEAR_CNTL_NOT_FASTCLEAR);
+
+       OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1);
+       OUT_RING(ring, 0x0);
+
        ctx->needs_rb_fbd = true;
 }
index 89ae260c855a93801ab39db53c9224aba2e8adf8..8ad0039300569104aafff68a220b2b4fd9d2bb51 100644 (file)
@@ -500,10 +500,12 @@ fd4_emit_tile_prep(struct fd_context *ctx, struct fd_tile *tile)
                OUT_RING(ring, 0x00000000);
        }
 
+       OUT_PKT0(ring, REG_A4XX_GRAS_DEPTH_CONTROL, 1);
        if (pfb->zsbuf) {
-               OUT_PKT0(ring, REG_A4XX_GRAS_DEPTH_CONTROL, 1);
                OUT_RING(ring, A4XX_GRAS_DEPTH_CONTROL_FORMAT(
                                fd4_pipe2depth(pfb->zsbuf->format)));
+       } else {
+               OUT_RING(ring, A4XX_GRAS_DEPTH_CONTROL_FORMAT(DEPTH4_NONE));
        }
 
        if (ctx->needs_rb_fbd) {