Add bank address test

diff --git a/gram/test/test_dfii.py b/gram/test/test_dfii.py
index 7d4530ccf15bae21b014ed530eac9e6d61c6ff3f..f143867524f618a3eb80c0ae52a1de778ef2a3d4 100644 (file)
--- a/gram/test/test_dfii.py
+++ b/gram/test/test_dfii.py
@@ -52,3 +52,12 @@ class PhaseInjectorTestCase(FHDLTestCase):
             self.assertEqual((yield dfi.phases[0].address), 0xCDC)
 
         runSimulation(m, process, "test_phaseinjector.vcd")
+
+    def test_setbankaddress(self):
+        m, dfi, csrhost = self.generate_phaseinjector()
+
+        def process():
+            yield from wb_write(csrhost.bus, 0xC >> 2, 0xA8, sel=0xF)
+            self.assertEqual((yield dfi.phases[0].bank), 0xA8)
+
+        runSimulation(m, process, "test_phaseinjector.vcd")