#if FULL_SYSTEM
// SMT is not supported in FS mode yet.
assert(numThreads == 1);
- thread[tid] = new Thread(this, 0);
+ thread[tid] = new Thread(this, 0, NULL);
#else
if (tid < (ThreadID)params->workload.size()) {
DPRINTF(InOrderCPU, "Workload[%i] process is %#x\n",
class ProfileNode;
#else
class FunctionalMemory;
-class Process;
#endif
+class Process;
/**
* Class that has various thread state, such as the status, the
*/
bool trapPending;
-#if FULL_SYSTEM
- InOrderThreadState(InOrderCPU *_cpu, ThreadID _thread_num)
- : ThreadState(reinterpret_cast<BaseCPU*>(_cpu), _thread_num),
- cpu(_cpu), inSyscall(0), trapPending(0), lastGradIsBranch(false)
- { }
-#else
InOrderThreadState(InOrderCPU *_cpu, ThreadID _thread_num,
Process *_process)
: ThreadState(reinterpret_cast<BaseCPU*>(_cpu), _thread_num,
_process),
cpu(_cpu), inSyscall(0), trapPending(0), lastGradIsBranch(false)
{ }
-#endif
-#if !FULL_SYSTEM
/** Handles the syscall. */
void syscall(int64_t callnum) { process->syscall(callnum, tc); }
-#endif
#if FULL_SYSTEM
void dumpFuncProfile();
#if FULL_SYSTEM
// SMT is not supported in FS mode yet.
assert(this->numThreads == 1);
- this->thread[tid] = new Thread(this, 0);
+ this->thread[tid] = new Thread(this, 0, NULL);
#else
if (tid < params->workload.size()) {
DPRINTF(O3CPU, "Workload[%i] process is %#x",
*/
bool trapPending;
-#if FULL_SYSTEM
- O3ThreadState(O3CPU *_cpu, int _thread_num)
- : ThreadState(_cpu, _thread_num),
+ O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process)
+ : ThreadState(_cpu, _thread_num, _process),
cpu(_cpu), inSyscall(0), trapPending(0)
{
+#if FULL_SYSTEM
if (cpu->params()->profile) {
profile = new FunctionProfile(cpu->params()->system->kernelSymtab);
Callback *cb =
static ProfileNode dummyNode;
profileNode = &dummyNode;
profilePC = 3;
- }
-#else
- O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process)
- : ThreadState(_cpu, _thread_num, _process),
- cpu(_cpu), inSyscall(0), trapPending(0)
- { }
#endif
+ }
/** Pointer to the ThreadContext of this thread. */
ThreadContext *tc;
using namespace std;
// constructor
-#if FULL_SYSTEM
+#if !FULL_SYSTEM
+SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
+ TheISA::TLB *_itb, TheISA::TLB *_dtb)
+ : ThreadState(_cpu, _thread_num, _process),
+ cpu(_cpu), itb(_itb), dtb(_dtb)
+{
+ clearArchRegs();
+ tc = new ProxyThreadContext<SimpleThread>(this);
+}
+#else
SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
TheISA::TLB *_itb, TheISA::TLB *_dtb,
bool use_kernel_stats)
- : ThreadState(_cpu, _thread_num),
+ : ThreadState(_cpu, _thread_num, NULL),
cpu(_cpu), system(_sys), itb(_itb), dtb(_dtb)
{
if (use_kernel_stats)
kernelStats = new TheISA::Kernel::Statistics(system);
}
-#else
-SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
- TheISA::TLB *_itb, TheISA::TLB *_dtb)
- : ThreadState(_cpu, _thread_num, _process),
- cpu(_cpu), itb(_itb), dtb(_dtb)
-{
- clearArchRegs();
- tc = new ProxyThreadContext<SimpleThread>(this);
-}
-
#endif
SimpleThread::SimpleThread()
-#if FULL_SYSTEM
- : ThreadState(NULL, -1)
-#else
: ThreadState(NULL, -1, NULL)
-#endif
{
tc = new ProxyThreadContext<SimpleThread>(this);
}
#include "cpu/quiesce_event.hh"
#endif
-#if FULL_SYSTEM
-ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid)
-#else
ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
-#endif
: numInst(0), numLoad(0), _status(ThreadContext::Halted),
baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
#if FULL_SYSTEM
profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
kernelStats(NULL),
-#else
- process(_process),
#endif
- port(NULL), virtPort(NULL), physPort(NULL), funcExeInst(0),
- storeCondFailures(0)
+ process(_process), port(NULL), virtPort(NULL), physPort(NULL),
+ funcExeInst(0), storeCondFailures(0)
{
}
ThreadState::~ThreadState()
{
-#if !FULL_SYSTEM
if (port) {
delete port->getPeer();
delete port;
}
-#endif
}
void
/* Use this port to for syscall emulation writes to memory. */
port = new TranslatingPort(csprintf("%s-%d-funcport", baseCpu->name(),
- _threadId),
-#if !FULL_SYSTEM
- process,
-#endif
- TranslatingPort::NextPage);
+ _threadId), process, TranslatingPort::NextPage);
connectToMemFunc(port);
#include "cpu/base.hh"
#include "cpu/profile.hh"
#include "cpu/thread_context.hh"
-
-#if !FULL_SYSTEM
#include "mem/mem_object.hh"
#include "sim/process.hh"
-#endif
#if FULL_SYSTEM
class EndQuiesceEvent;
struct ThreadState {
typedef ThreadContext::Status Status;
-#if FULL_SYSTEM
- ThreadState(BaseCPU *cpu, ThreadID _tid);
-#else
ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
-#endif
~ThreadState();
EndQuiesceEvent *quiesceEvent;
TheISA::Kernel::Statistics *kernelStats;
+#endif
protected:
-#else
Process *process;
-#endif
TranslatingPort *port;
using namespace std;
using namespace TheISA;
-PageTable::PageTable(
-#if !FULL_SYSTEM
- Process *_process,
-#endif
- Addr _pageSize)
- : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize)))
-#if !FULL_SYSTEM
- , process(_process)
-#endif
+PageTable::PageTable(Process *_process, Addr _pageSize)
+ : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
+ process(_process)
{
assert(isPowerOf2(pageSize));
pTableCache[0].vaddr = 0;
vaddr);
}
-#if !FULL_SYSTEM
pTable[vaddr] = TheISA::TlbEntry(process->M5_pid, vaddr,
process->system->new_page());
updateCache(vaddr, pTable[vaddr]);
-#endif
}
}
PTableItr iter = pTable.begin();
PTableItr end = pTable.end();
while (iter != end) {
-#if !FULL_SYSTEM
os << "\n[" << csprintf("%s.Entry%d", process->name(), count) << "]\n";
-#endif
paramOut(os, "vaddr", iter->first);
iter->second.serialize(os);
pTable.clear();
while (i < count) {
-#if !FULL_SYSTEM
TheISA::TlbEntry *entry;
Addr vaddr;
entry->unserialize(cp, csprintf("%s.Entry%d", process->name(), i));
pTable[vaddr] = *entry;
++i;
-#endif
}
}
#include "mem/request.hh"
#include "sim/serialize.hh"
-#if !FULL_SYSTEM
class Process;
-#endif
/**
* Page Table Declaration.
const Addr pageSize;
const Addr offsetMask;
-#if !FULL_SYSTEM
Process *process;
-#endif
public:
- PageTable(
-#if !FULL_SYSTEM
- Process *_process,
-#endif
- Addr _pageSize = TheISA::VMPageSize);
+ PageTable(Process *_process, Addr _pageSize = TheISA::VMPageSize);
~PageTable();
#include "arch/isa_traits.hh"
#include "base/chunk_generator.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "mem/page_table.hh"
#include "mem/port.hh"
#include "mem/translating_port.hh"
-#if !FULL_SYSTEM
#include "sim/process.hh"
-#endif
using namespace TheISA;
-TranslatingPort::TranslatingPort(const std::string &_name,
-#if !FULL_SYSTEM
- Process *p,
-#endif
+TranslatingPort::TranslatingPort(const std::string &_name, Process *p,
AllocType alloc)
- : FunctionalPort(_name),
-#if !FULL_SYSTEM
- pTable(p->pTable), process(p),
-#endif
- allocating(alloc)
+ : FunctionalPort(_name), pTable(p->pTable), process(p), allocating(alloc)
{ }
TranslatingPort::~TranslatingPort()
VMPageSize);
} else if (allocating == NextPage) {
// check if we've accessed the next page on the stack
-#if !FULL_SYSTEM
if (!process->fixupStackFault(gen.addr()))
panic("Page table fault when accessing virtual address %#x "
"during functional write\n", gen.addr());
-#endif
} else {
return false;
}
#ifndef __MEM_TRANSLATING_PROT_HH__
#define __MEM_TRANSLATING_PROT_HH__
-#include "config/full_system.hh"
#include "mem/port.hh"
class PageTable;
-#if !FULL_SYSTEM
class Process;
-#endif
class TranslatingPort : public FunctionalPort
{
private:
PageTable *pTable;
-#if !FULL_SYSTEM
Process *process;
-#endif
AllocType allocating;
public:
- TranslatingPort(const std::string &_name,
-#if !FULL_SYSTEM
- Process *p,
-#endif
- AllocType alloc);
+ TranslatingPort(const std::string &_name, Process *p, AllocType alloc);
virtual ~TranslatingPort();
bool tryReadBlob(Addr addr, uint8_t *p, int size);
Source('stat_control.cc')
if env['TARGET_ISA'] != 'no':
+ SimObject('Process.py')
SimObject('System.py')
Source('faults.cc')
+ Source('process.cc')
Source('pseudo_inst.cc')
Source('system.cc')
Source('arguments.cc')
elif env['TARGET_ISA'] != 'no':
Source('tlb.cc')
- SimObject('Process.py')
- Source('process.cc')
Source('syscall_emul.cc')
DebugFlag('Checkpoint')
using namespace std;
using namespace TheISA;
-//
-// The purpose of this code is to fake the loader & syscall mechanism
-// when there's no OS: thus there's no resone to use it in FULL_SYSTEM
-// mode when we do have an OS
-//
-#if FULL_SYSTEM
-#error "process.cc not compatible with FULL_SYSTEM"
-#endif
-
// current number of allocated processes
int num_processes = 0;
void
LiveProcess::syscall(int64_t callnum, ThreadContext *tc)
{
+#if !FULL_SYSTEM
num_syscalls++;
SyscallDesc *desc = getDesc(callnum);
fatal("Syscall %d out of range", callnum);
desc->doSyscall(callnum, this, tc);
+#endif
}
IntReg
"executables are supported!\n Please recompile your "
"executable as a static binary and try again.\n");
+#if !FULL_SYSTEM
#if THE_ISA == ALPHA_ISA
if (objFile->getArch() != ObjectFile::Alpha)
fatal("Object file architecture does not match compiled ISA (Alpha).");
#else
#error "THE_ISA not set"
#endif
-
+#endif
if (process == NULL)
fatal("Unknown error creating process object.");
#ifndef __PROCESS_HH__
#define __PROCESS_HH__
-//
-// The purpose of this code is to fake the loader & syscall mechanism
-// when there's no OS: thus there's no reason to use it in FULL_SYSTEM
-// mode when we do have an OS.
-//
-#include "config/full_system.hh"
-
-#if !FULL_SYSTEM
-
#include <string>
#include <vector>
};
-#endif // !FULL_SYSTEM
-
#endif // __PROCESS_HH__
#ifndef __SIM_PROCESS_IMPL_HH__
#define __SIM_PROCESS_IMPL_HH__
-//
-// The purpose of this code is to fake the loader & syscall mechanism
-// when there's no OS: thus there's no reason to use it in FULL_SYSTEM
-// mode when we do have an OS.
-//
-#include "config/full_system.hh"
-
-#if !FULL_SYSTEM
-
#include <string>
#include <vector>
memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr, sizeof(AddrType));
}
-
-#endif // !FULL_SYSTEM
-
#endif
#include "mem/translating_port.hh"
#include "sim/byteswap.hh"
#include "sim/process.hh"
+#include "sim/syscallreturn.hh"
#include "sim/system.hh"
///