X86: Allow additional ISAs for IAMCU in assembler
authorH.J. Lu <hjl.tools@gmail.com>
Wed, 7 Sep 2016 16:16:25 +0000 (09:16 -0700)
committerH.J. Lu <hjl.tools@gmail.com>
Wed, 7 Sep 2016 16:22:19 +0000 (09:22 -0700)
Originally only Pentium integer instructions are allowed for IAMCU.
This patch removes such a restriction.  For example, 387 and SSE2
instructions can be enabled by passing "-march=iamcu+sse2+387" to
assembler.

gas/

* config/tc-i386.c (valid_iamcu_cpu_flags): Removed.
(set_cpu_arch): Updated.
(md_parse_option): Likewise.
* testsuite/gas/i386/i386.exp: Run iamcu-4 and iamcu-5.  Remove
iamcu-inval-2 and iamcu-inval-3.
* testsuite/gas/i386/iamcu-4.d: New file.
* testsuite/gas/i386/iamcu-4.s: Likewise.
* testsuite/gas/i386/iamcu-5.d: Likewise.
* testsuite/gas/i386/iamcu-5.s: Likewise.
* testsuite/gas/i386/iamcu-inval-2.l: Removed.
* testsuite/gas/i386/iamcu-inval-2.s: Likewise.
* testsuite/gas/i386/iamcu-inval-3.l: Likewise.
* testsuite/gas/i386/iamcu-inval-3.s: Likewise.

opcodes/

* i386-gen.c (cpu_flag_init): Remove CPU_IAMCU_COMPAT_FLAGS.
* i386-init.h: Regenerated.

14 files changed:
gas/ChangeLog
gas/config/tc-i386.c
gas/testsuite/gas/i386/i386.exp
gas/testsuite/gas/i386/iamcu-4.d [new file with mode: 0644]
gas/testsuite/gas/i386/iamcu-4.s [new file with mode: 0644]
gas/testsuite/gas/i386/iamcu-5.d [new file with mode: 0644]
gas/testsuite/gas/i386/iamcu-5.s [new file with mode: 0644]
gas/testsuite/gas/i386/iamcu-inval-2.l [deleted file]
gas/testsuite/gas/i386/iamcu-inval-2.s [deleted file]
gas/testsuite/gas/i386/iamcu-inval-3.l [deleted file]
gas/testsuite/gas/i386/iamcu-inval-3.s [deleted file]
opcodes/ChangeLog
opcodes/i386-gen.c
opcodes/i386-init.h

index 085eedd8b74a612c058d9f31ce603d2e82a1d46c..6fbb69372cfb8aef4fc82468ef01cf08b2eb60a4 100644 (file)
@@ -1,3 +1,19 @@
+2016-09-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (valid_iamcu_cpu_flags): Removed.
+       (set_cpu_arch): Updated.
+       (md_parse_option): Likewise.
+       * testsuite/gas/i386/i386.exp: Run iamcu-4 and iamcu-5.  Remove
+       iamcu-inval-2 and iamcu-inval-3.
+       * testsuite/gas/i386/iamcu-4.d: New file.
+       * testsuite/gas/i386/iamcu-4.s: Likewise.
+       * testsuite/gas/i386/iamcu-5.d: Likewise.
+       * testsuite/gas/i386/iamcu-5.s: Likewise.
+       * testsuite/gas/i386/iamcu-inval-2.l: Removed.
+       * testsuite/gas/i386/iamcu-inval-2.s: Likewise.
+       * testsuite/gas/i386/iamcu-inval-3.l: Likewise.
+       * testsuite/gas/i386/iamcu-inval-3.s: Likewise.
+
 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 
        * config/tc-arm.c ((arm_cpus): Use ARM_ARCH_V8A_CRC for all
index 626f7bfc8bc63fdf5742ca9748ded691dc5cb62a..9da7a4ea54c988160dd1547183fc62ae0f7c58dc 100644 (file)
@@ -1520,20 +1520,6 @@ cpu_flags_and_not (i386_cpu_flags x, i386_cpu_flags y)
   return x;
 }
 
-static int
-valid_iamcu_cpu_flags (const i386_cpu_flags *flags)
-{
-  if (cpu_arch_isa == PROCESSOR_IAMCU)
-    {
-      static const i386_cpu_flags iamcu_flags = CPU_IAMCU_COMPAT_FLAGS;
-      i386_cpu_flags compat_flags;
-      compat_flags = cpu_flags_and_not (*flags, iamcu_flags);
-      return cpu_flags_all_zero (&compat_flags);
-    }
-  else
-    return 1;
-}
-
 #define CPU_FLAGS_ARCH_MATCH           0x1
 #define CPU_FLAGS_64BIT_MATCH          0x2
 #define CPU_FLAGS_AES_MATCH            0x4
@@ -2424,10 +2410,7 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
              flags = cpu_flags_or (cpu_arch_flags,
                                    cpu_arch[j].flags);
 
-             if (!valid_iamcu_cpu_flags (&flags))
-               as_fatal (_("`%s' isn't valid for Intel MCU"),
-                         cpu_arch[j].name);
-             else if (!cpu_flags_equal (&flags, &cpu_arch_flags))
+             if (!cpu_flags_equal (&flags, &cpu_arch_flags))
                {
                  if (cpu_sub_arch_name)
                    {
@@ -10021,9 +10004,7 @@ md_parse_option (int c, const char *arg)
                  flags = cpu_flags_or (cpu_arch_flags,
                                        cpu_arch[j].flags);
 
-                 if (!valid_iamcu_cpu_flags (&flags))
-                   as_fatal (_("`%s' isn't valid for Intel MCU"), arch);
-                 else if (!cpu_flags_equal (&flags, &cpu_arch_flags))
+                 if (!cpu_flags_equal (&flags, &cpu_arch_flags))
                    {
                      if (cpu_sub_arch_name)
                        {
index a546c2619ce77ac3f8d717f608ee2e591e6605ac..c2cdf606bce8ec5a13a8c1ce0219f88c67c31893 100644 (file)
@@ -441,9 +441,9 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
            run_dump_test "iamcu-1"
            run_dump_test "iamcu-2"
            run_dump_test "iamcu-3"
+           run_dump_test "iamcu-4"
+           run_dump_test "iamcu-5"
            run_list_test "iamcu-inval-1" "-march=iamcu -al"
-           run_list_test "iamcu-inval-2" "-march=iamcu -al"
-           run_list_test "iamcu-inval-3" "-march=iamcu+sse4 -al"
        }
     }
 
diff --git a/gas/testsuite/gas/i386/iamcu-4.d b/gas/testsuite/gas/i386/iamcu-4.d
new file mode 100644 (file)
index 0000000..afd8a8e
--- /dev/null
@@ -0,0 +1,12 @@
+#as: -J -march=iamcu+sse2+387
+#objdump: -dw
+#not-target: *-*-nacl*
+
+.*: +file format elf32-iamcu.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ +[a-f0-9]+:   d9 ff                   fcos   
+ +[a-f0-9]+:   66 0f 58 01             addpd  \(%ecx\),%xmm0
+#pass
diff --git a/gas/testsuite/gas/i386/iamcu-4.s b/gas/testsuite/gas/i386/iamcu-4.s
new file mode 100644 (file)
index 0000000..253763e
--- /dev/null
@@ -0,0 +1,3 @@
+       .text
+       fcos
+       addpd   (%ecx),%xmm0
diff --git a/gas/testsuite/gas/i386/iamcu-5.d b/gas/testsuite/gas/i386/iamcu-5.d
new file mode 100644 (file)
index 0000000..dde6977
--- /dev/null
@@ -0,0 +1,12 @@
+#as: -J -march=iamcu -I${srcdir}/$subdir
+#objdump: -dw
+#not-target: *-*-nacl*
+
+.*: +file format elf32-iamcu.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ +[a-f0-9]+:   d9 ff                   fcos   
+ +[a-f0-9]+:   66 0f 58 01             addpd  \(%ecx\),%xmm0
+#pass
diff --git a/gas/testsuite/gas/i386/iamcu-5.s b/gas/testsuite/gas/i386/iamcu-5.s
new file mode 100644 (file)
index 0000000..afc558e
--- /dev/null
@@ -0,0 +1,3 @@
+       .arch .sse2
+       .arch .387
+.include "iamcu-4.s"
diff --git a/gas/testsuite/gas/i386/iamcu-inval-2.l b/gas/testsuite/gas/i386/iamcu-inval-2.l
deleted file mode 100644 (file)
index e62e29d..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-.*: Assembler messages:
-.*:2: Fatal error: `.sse4.1' isn't valid for Intel MCU
diff --git a/gas/testsuite/gas/i386/iamcu-inval-2.s b/gas/testsuite/gas/i386/iamcu-inval-2.s
deleted file mode 100644 (file)
index 46ef3ff..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-# Invalid .arch for Intel MCU
-       .arch .sse4.1
diff --git a/gas/testsuite/gas/i386/iamcu-inval-3.l b/gas/testsuite/gas/i386/iamcu-inval-3.l
deleted file mode 100644 (file)
index a9762a5..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-Assembler messages:
-Fatal error: `sse4' isn't valid for Intel MCU
diff --git a/gas/testsuite/gas/i386/iamcu-inval-3.s b/gas/testsuite/gas/i386/iamcu-inval-3.s
deleted file mode 100644 (file)
index 1c255e2..0000000
+++ /dev/null
@@ -1 +0,0 @@
-.include "iamcu-1.s"
index fdb78afec13a1e74b1a585c0f19029f06439ff24..593fc06d32e976ae6ca1291285736d0ac311db80 100644 (file)
@@ -1,3 +1,8 @@
+2016-09-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-gen.c (cpu_flag_init): Remove CPU_IAMCU_COMPAT_FLAGS.
+       * i386-init.h: Regenerated.
+
 2016-08-30  Cupertino Miranda  <cmiranda@synopsys.com>
 
        * opcodes/arc-dis.c (print_insn_arc): Changed.
index c819b95d7d92c56bb4d3718d9a13e6582ef989b0..bf4a021d42662089608d2ccd370667444d09d5b2 100644 (file)
@@ -223,8 +223,6 @@ static initializer cpu_flag_init[] =
     "unknown" },
   { "CPU_IAMCU_FLAGS",
     "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586" },
-  { "CPU_IAMCU_COMPAT_FLAGS",
-    "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuNo64|CpuNop" },
   { "CPU_ADX_FLAGS",
     "CpuADX" },
   { "CPU_RDSEED_FLAGS",
index 2c60ce0ddf4eeac86bc827357055cd4a42741f75..c58a4e56cc31555db973af8420c854e7665d712f 100644 (file)
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 
-#define CPU_IAMCU_COMPAT_FLAGS \
-  { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }
-
 #define CPU_ADX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \