+2015-12-08 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/aarch64/aarch64-options-extensions.def: Remove
+ AARCH64_FL_RDMA from "fp" and "simd". Remove "pan", "lor",
+ "rdma".
+ * config/aarch64/aarch64.h (AARCH64_FL_PAN): Remove.
+ (AARCH64_FL_LOR): Remove.
+ (AARCH64_FL_RDMA): Remove.
+ (AARCH64_FL_V8_1): New.
+ (AARCH64_FL_FOR_AARCH8_1): Replace AARCH64_FL_PAN, AARCH64_FL_LOR
+ and AARCH64_FL_RDMA with AARCH64_FL_V8_1.
+ (AARCH64_ISA_RDMA): Replace AARCH64_FL_RDMA with AARCH64_FL_V8_1.
+ * doc/invoke.texi (AArch64 -march): Rewrite initial paragraph and
+ section on -march=native. Group descriptions of permitted
+ architecture names together. Expand description of
+ -march=armv8.1-a.
+ (AArch64 -mtune): Slightly rework section on -march=native.
+ (AArch64 -mcpu): Slightly rework section on -march=native.
+ (AArch64 Feature Modifiers): Remove "pan", "lor" and "rdma".
+ State that -march=armv8.1-a enables "crc" and "lse".
+
2015-12-08 Eric Botcazou <ebotcazou@adacore.com>
* doc/invoke.texi (SPARC options): Fix typo.
should contain a whitespace-separated list of the strings in 'Features'
that are required. Their order is not important. */
-AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, AARCH64_FL_FPSIMD | AARCH64_FL_CRYPTO | AARCH64_FL_RDMA, "fp")
-AARCH64_OPT_EXTENSION("simd", AARCH64_FL_FPSIMD, AARCH64_FL_SIMD | AARCH64_FL_CRYPTO | AARCH64_FL_RDMA, "asimd")
+AARCH64_OPT_EXTENSION ("fp", AARCH64_FL_FP,
+ AARCH64_FL_FPSIMD | AARCH64_FL_CRYPTO, "fp")
+AARCH64_OPT_EXTENSION ("simd", AARCH64_FL_FPSIMD,
+ AARCH64_FL_SIMD | AARCH64_FL_CRYPTO, "asimd")
AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO | AARCH64_FL_FPSIMD, AARCH64_FL_CRYPTO, "aes pmull sha1 sha2")
AARCH64_OPT_EXTENSION("crc", AARCH64_FL_CRC, AARCH64_FL_CRC, "crc32")
AARCH64_OPT_EXTENSION("lse", AARCH64_FL_LSE, AARCH64_FL_LSE, "lse")
-AARCH64_OPT_EXTENSION("pan", AARCH64_FL_PAN, AARCH64_FL_PAN, "pan")
-AARCH64_OPT_EXTENSION("lor", AARCH64_FL_LOR, AARCH64_FL_LOR, "lor")
-AARCH64_OPT_EXTENSION("rdma", AARCH64_FL_RDMA | AARCH64_FL_FPSIMD, AARCH64_FL_RDMA, "rdma")
#define AARCH64_FL_CRC (1 << 3) /* Has CRC. */
/* ARMv8.1 architecture extensions. */
#define AARCH64_FL_LSE (1 << 4) /* Has Large System Extensions. */
-#define AARCH64_FL_PAN (1 << 5) /* Has Privileged Access Never. */
-#define AARCH64_FL_LOR (1 << 6) /* Has Limited Ordering regions. */
-#define AARCH64_FL_RDMA (1 << 7) /* Has ARMv8.1 Adv.SIMD. */
+#define AARCH64_FL_V8_1 (1 << 5) /* Has ARMv8.1 extensions. */
/* Has FP and SIMD. */
#define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD)
/* Architecture flags that effect instruction selection. */
#define AARCH64_FL_FOR_ARCH8 (AARCH64_FL_FPSIMD)
#define AARCH64_FL_FOR_ARCH8_1 \
- (AARCH64_FL_FOR_ARCH8 | AARCH64_FL_LSE | AARCH64_FL_PAN \
- | AARCH64_FL_LOR | AARCH64_FL_RDMA)
+ (AARCH64_FL_FOR_ARCH8 | AARCH64_FL_LSE | AARCH64_FL_V8_1)
/* Macros to test ISA flags. */
#define AARCH64_ISA_FP (aarch64_isa_flags & AARCH64_FL_FP)
#define AARCH64_ISA_SIMD (aarch64_isa_flags & AARCH64_FL_SIMD)
#define AARCH64_ISA_LSE (aarch64_isa_flags & AARCH64_FL_LSE)
-#define AARCH64_ISA_RDMA (aarch64_isa_flags & AARCH64_FL_RDMA)
+#define AARCH64_ISA_RDMA (aarch64_isa_flags & AARCH64_FL_V8_1)
/* Crypto is an optional extension to AdvSIMD. */
#define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO)
@item -march=@var{name}
@opindex march
-Specify the name of the target architecture, optionally suffixed by one or
+Specify the name of the target architecture and, optionally, one or
more feature modifiers. This option has the form
@option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}.
-The permissible values for @var{arch} are @samp{armv8-a} or
-@samp{armv8.1-a}.
+The permissible values for @var{arch} are @samp{armv8-a},
+@samp{armv8.1-a} or @var{native}.
-For the permissible values for @var{feature}, see the sub-section on
-@ref{aarch64-feature-modifiers,,@option{-march} and @option{-mcpu}
+The value @samp{armv8.1-a} implies @samp{armv8-a} and enables compiler
+support for the ARMv8.1 architecture extension. In particular, it
+enables the @samp{+crc} and @samp{+lse} features.
+
+The value @samp{native} is available on native AArch64 GNU/Linux and
+causes the compiler to pick the architecture of the host system. This
+option has no effect if the compiler is unable to recognize the
+architecture of the host system,
+
+The permissible values for @var{feature} are listed in the sub-section
+on @ref{aarch64-feature-modifiers,,@option{-march} and @option{-mcpu}
Feature Modifiers}. Where conflicting feature modifiers are
specified, the right-most feature is used.
-Additionally on native AArch64 GNU/Linux systems the value
-@samp{native} is available. This option causes the compiler to pick the
-architecture of the host system. If the compiler is unable to recognize the
-architecture of the host system this option has no effect.
-
GCC uses @var{name} to determine what kind of instructions it can emit
when generating assembly code. If @option{-march} is specified
without either of @option{-mtune} or @option{-mcpu} also being
Additionally on native AArch64 GNU/Linux systems the value
@samp{native} is available. This option causes the compiler to pick
the architecture of and tune the performance of the code for the
-processor of the host system. If the compiler is unable to recognize
-the processor of the host system this option has no effect.
+processor of the host system. This option has no effect if the
+compiler is unable to recognize the architecture of the host system.
Where none of @option{-mtune=}, @option{-mcpu=} or @option{-march=}
are specified, the code is tuned to perform well across a range
Additionally on native AArch64 GNU/Linux systems the value
@samp{native} is available. This option causes the compiler to tune
-the performance of the code for the processor of the host system. If
-the compiler is unable to recognize the processor of the host system
-this option has no effect.
+the performance of the code for the processor of the host system.
+This option has no effect if the compiler is unable to recognize the
+architecture of the host system.
GCC uses @var{name} to determine what kind of instructions it can emit when
generating assembly code (as if by @option{-march}) and to determine
@table @samp
@item crc
-Enable CRC extension.
+Enable CRC extension. This is on by default for
+@option{-march=armv8.1-a}.
@item crypto
Enable Crypto extension. This also enables Advanced SIMD and floating-point
instructions.
instructions. This is on by default for all possible values for options
@option{-march} and @option{-mcpu}.
@item lse
-Enable Large System Extension instructions.
-@item pan
-Enable Privileged Access Never support.
-@item lor
-Enable Limited Ordering Regions support.
-@item rdma
-Enable ARMv8.1 Advanced SIMD instructions. This implies Advanced SIMD
-is enabled.
+Enable Large System Extension instructions. This is on by default for
+@option{-march=armv8.1-a}.
@end table
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