AVX-512. Limit constraint for scalar operand in split to AVX-512VL.

PR target/71346
gcc/
	* config/i386/sse.md (define_insn_and_split "*vec_extractv4sf_0"): Use
	`Yv' for scalar operand.
testsuite/
	* gcc.target/i386/pr71346.c: New test.

From-SVN: r236909

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 88fa0e569b14f0c27618a5b1f2bf120c0afa711c..587afe0b1f16f5468c2a30b213f5840380337516 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-05-31  Kirill Yukhin  <kirill.yukhin@intel.com>
+
+       PR target/71346
+       * config/i386/sse.md (define_insn_and_split "*vec_extractv4sf_0"): Use
+       `Yv' for scalar operand.
+
 2016-05-31  Tom de Vries  <tom@codesourcery.com>
 
        PR tree-optimization/69068

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index b348f2df5447ad849425a19182bcfc5784328c54..12678978584eed7db9d144a8f568897cdb4d238e 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6837,7 +6837,7 @@
   "operands[1] = gen_lowpart (SFmode, operands[1]);")
 
 (define_insn_and_split "*sse4_1_extractps"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=rm,rm,rm,v,v")
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=rm,rm,rm,Yv,Yv")
        (vec_select:SF
          (match_operand:V4SF 1 "register_operand" "Yr,*x,v,0,v")
          (parallel [(match_operand:SI 2 "const_0_to_3_operand" "n,n,n,n,n")])))]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0ae4c9bff9e8fda6c1f9a8bcf3001a1a843fcfc5..05eb1e8d0847c698b17555784b8c6e52fb2aa5cc 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-05-31  Kirill Yukhin  <kirill.yukhin@intel.com>
+
+       PR target/71346
+       * gcc.target/i386/pr71346.c: New test.
+
 2016-05-31  Tom de Vries  <tom@codesourcery.com>
 
        PR tree-optimization/69068

diff --git a/gcc/testsuite/gcc.target/i386/pr71346.c b/gcc/testsuite/gcc.target/i386/pr71346.c
new file mode 100644 (file)
index 0000000..0a15869
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr71346.c
@@ -0,0 +1,25 @@
+/* PR target/71346 */
+/* { dg-do compile { target { ! ia32 } }  } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math -march=knl" } */
+
+typedef int rvec[3];
+int a;
+float b, c, d, g;
+rvec *e, *f;
+void fn2(float h, float g);
+
+void
+fn1()
+{
+  float h;
+  for (; a; a++) {
+    h += e[a][0] * f[a][0];
+    b += e[a][0] * f[a][1];
+    c += e[a][2] * f[a][0];
+    d += e[a][2] * f[a][1];
+    g += e[a][2] * f[a][2];
+  }
+  fn2(h, g);
+}
+
+/* { dg-final { scan-assembler-not "vshufps\[ \\t\]+\[^\n\]*%\xmm(?:1\[6-9\]|\[2-3\]\[0-9\])" } } */