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Fixed a verilog parser memory leak
author
Clifford Wolf
<clifford@clifford.at>
Mon, 25 Jul 2016 14:37:58 +0000
(16:37 +0200)
committer
Clifford Wolf
<clifford@clifford.at>
Mon, 25 Jul 2016 14:37:58 +0000
(16:37 +0200)
frontends/verilog/verilog_parser.y
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diff --git
a/frontends/verilog/verilog_parser.y
b/frontends/verilog/verilog_parser.y
index d1da630d579f6671b9064c67511f5b017e50bb0c..4cb65a088386729672cd76a20d5567693f9c8d49 100644
(file)
--- a/
frontends/verilog/verilog_parser.y
+++ b/
frontends/verilog/verilog_parser.y
@@
-880,6
+880,7
@@
cell_port_list:
if (!node->children.empty()) break;
if (!node->str.empty()) break;
astbuf2->children.pop_back();
+ delete node;
}
// check port types