at virtual address MEM and store in BUF. Result is number of bytes
read, or zero if error. */
-int sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length);
+int sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length);
/* Store LENGTH bytes from BUF into the simulated program's
memory. Store bytes starting at virtual address MEM. Result is
number of bytes write, or zero if error. */
-int sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length);
+int sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length);
/* Fetch register REGNO storing its raw (target endian) value in the
int
sim_write (SIM_DESC sd ATTRIBUTE_UNUSED,
SIM_ADDR addr,
- const unsigned char * buffer,
+ const void * buffer,
int size)
{
int i;
+ const unsigned char * data = buffer;
init ();
for (i = 0; i < size; i++)
- ARMul_SafeWriteByte (state, addr + i, buffer[i]);
+ ARMul_SafeWriteByte (state, addr + i, data[i]);
return size;
}
int
sim_read (SIM_DESC sd ATTRIBUTE_UNUSED,
SIM_ADDR addr,
- unsigned char * buffer,
+ void * buffer,
int size)
{
int i;
+ unsigned char * data = buffer;
init ();
for (i = 0; i < size; i++)
- buffer[i] = ARMul_SafeReadByte (state, addr + i);
+ data[i] = ARMul_SafeReadByte (state, addr + i);
return size;
}
}
int
-sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size)
+sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
{
int osize = size;
if (addr >= 0 && addr < SRAM_VADDR)
{
+ const unsigned char *data = buffer;
while (size > 0 && addr < (MAX_AVR_FLASH << 1))
{
word val = flash[addr >> 1].op;
if (addr & 1)
- val = (val & 0xff) | (buffer[0] << 8);
+ val = (val & 0xff) | (data[0] << 8);
else
- val = (val & 0xff00) | buffer[0];
+ val = (val & 0xff00) | data[0];
flash[addr >> 1].op = val;
flash[addr >> 1].code = OP_unknown;
addr++;
- buffer++;
+ data++;
size--;
}
return osize - size;
}
int
-sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
+sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size)
{
int osize = size;
if (addr >= 0 && addr < SRAM_VADDR)
{
+ unsigned char *data = buffer;
while (size > 0 && addr < (MAX_AVR_FLASH << 1))
{
word val = flash[addr >> 1].op;
if (addr & 1)
val >>= 8;
- *buffer++ = val;
+ *data++ = val;
addr++;
size--;
}
case DMAFLOW_ARRAY:
if (ndsize == 0 || ndsize > 7)
hw_abort (me, "DMA config error: DMAFLOW_ARRAY requires NDSIZE 1...7");
- sim_read (hw_system (me), dma->curr_desc_ptr, (void *)flows, ndsize * 2);
+ sim_read (hw_system (me), dma->curr_desc_ptr, flows, ndsize * 2);
break;
case DMAFLOW_SMALL:
if (ndsize == 0 || ndsize > 8)
hw_abort (me, "DMA config error: DMAFLOW_SMALL requires NDSIZE 1...8");
- sim_read (hw_system (me), dma->next_desc_ptr, (void *)flows, ndsize * 2);
+ sim_read (hw_system (me), dma->next_desc_ptr, flows, ndsize * 2);
break;
case DMAFLOW_LARGE:
if (ndsize == 0 || ndsize > 9)
hw_abort (me, "DMA config error: DMAFLOW_LARGE requires NDSIZE 1...9");
- sim_read (hw_system (me), dma->next_desc_ptr, (void *)flows, ndsize * 2);
+ sim_read (hw_system (me), dma->next_desc_ptr, flows, ndsize * 2);
break;
default:
hw_abort (me, "DMA config error: invalid DMAFLOW %#x", dma->config);
hw_abort (me, "DTEST_COMMAND bits undefined");
if (value & TEST_WRITE)
- sim_write (hw_system (me), addr, (void *)mmu->dtest_data, 8);
+ sim_write (hw_system (me), addr, mmu->dtest_data, 8);
else
- sim_read (hw_system (me), addr, (void *)mmu->dtest_data, 8);
+ sim_read (hw_system (me), addr, mmu->dtest_data, 8);
}
break;
default:
{
bu16 emuexcpt = 0x25;
sim_do_commandf (sd, "memory-size 0x%x", BFIN_DEFAULT_MEM_SIZE);
- sim_write (sd, 0, (void *)&emuexcpt, 2);
+ sim_write (sd, 0, &emuexcpt, 2);
}
/* Check for/establish the a reference program image. */
/* Push the Ehdr onto the stack. */
*sp -= sizeof (ehdr);
elf_addrs[3] = *sp;
- sim_write (sd, *sp, (void *)&ehdr, sizeof (ehdr));
+ sim_write (sd, *sp, &ehdr, sizeof (ehdr));
if (STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG)
sim_io_printf (sd, " Elf_Ehdr: %#x\n", *sp);
max_load_addr = max (paddr + memsz, max_load_addr);
*sp -= 12;
- sim_write (sd, *sp+0, (void *)&paddr, 4); /* loadseg.addr */
- sim_write (sd, *sp+4, (void *)&vaddr, 4); /* loadseg.p_vaddr */
- sim_write (sd, *sp+8, (void *)&memsz, 4); /* loadseg.p_memsz */
+ sim_write (sd, *sp+0, &paddr, 4); /* loadseg.addr */
+ sim_write (sd, *sp+4, &vaddr, 4); /* loadseg.p_vaddr */
+ sim_write (sd, *sp+8, &memsz, 4); /* loadseg.p_memsz */
++nsegs;
}
else if (phdrs[i].p_type == PT_DYNAMIC)
/* Push the summary loadmap info onto the stack last. */
*sp -= 4;
sim_write (sd, *sp+0, null, 2); /* loadmap.version */
- sim_write (sd, *sp+2, (void *)&nsegs, 2); /* loadmap.nsegs */
+ sim_write (sd, *sp+2, &nsegs, 2); /* loadmap.nsegs */
ret = true;
skip_fdpic_init:
auxvt_size += 8; \
sp -= 4; \
auxvt = (val); \
- sim_write (sd, sp, (void *)&auxvt, 4); \
+ sim_write (sd, sp, &auxvt, 4); \
sp -= 4; \
auxvt = (at); \
- sim_write (sd, sp, (void *)&auxvt, 4)
+ sim_write (sd, sp, &auxvt, 4)
unsigned int egid = getegid (), gid = getgid ();
unsigned int euid = geteuid (), uid = getuid ();
bu32 auxvt_size = 0;
SET_SPREG (sp);
/* First push the argc value. */
- sim_write (sd, sp, (void *)&argc, 4);
+ sim_write (sd, sp, &argc, 4);
sp += 4;
/* Then the actual argv strings so we know where to point argv[]. */
for (i = 0; i < argc; ++i)
{
unsigned len = strlen (argv[i]) + 1;
- sim_write (sd, sp_flat, (void *)argv[i], len);
- sim_write (sd, sp, (void *)&sp_flat, 4);
+ sim_write (sd, sp_flat, argv[i], len);
+ sim_write (sd, sp, &sp_flat, 4);
sp_flat += len;
sp += 4;
}
for (i = 0; i < envc; ++i)
{
unsigned len = strlen (env[i]) + 1;
- sim_write (sd, sp_flat, (void *)env[i], len);
- sim_write (sd, sp, (void *)&sp_flat, 4);
+ sim_write (sd, sp_flat, env[i], len);
+ sim_write (sd, sp, &sp_flat, 4);
sp_flat += len;
sp += 4;
}
while (argv[i])
{
bu32 len = strlen (argv[i]);
- sim_write (sd, cmdline, (void *)argv[i], len);
+ sim_write (sd, cmdline, argv[i], len);
cmdline += len;
sim_write (sd, cmdline, &byte, 1);
++cmdline;
modeling real hardware */
int
-sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
+sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length)
{
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
return sim_core_read_buffer (sd, NULL, read_map,
- buf, mem, length);
+ buffer, mem, length);
}
int
-sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
+sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length)
{
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
return sim_core_write_buffer (sd, NULL, write_map,
- buf, mem, length);
+ buffer, mem, length);
}
typedef struct host_callback_struct host_callback;
typedef int sim_write_fn (SIM_DESC sd, SIM_ADDR mem,
- const unsigned char *buf, int length);
+ const void *buf, int length);
struct bfd *sim_load_file (SIM_DESC sd, const char *myname,
host_callback *callback, const char *prog,
struct bfd *prog_bfd, int verbose_p,
interp_load_addr offset. */
static int
-cris_write_interp (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
+cris_write_interp (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length)
{
return sim_write (sd, mem + interp_load_addr, buf, length);
}
int
-sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size)
+sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
{
/* FIXME: this should be performing a virtual transfer */
/* FIXME: We cast the const away, but it's safe because xfer_mem only reads
}
int
-sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
+sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size)
{
/* FIXME: this should be performing a virtual transfer */
return xfer_mem (sd, addr, buffer, size, 0);
}
int
-sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
+sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length)
{
int i, len;
+ const unsigned char *data = buffer;
for (i = 0; i < length; i++) {
- sis_memory_write ((mem + i) ^ EBT, &buf[i], 1);
+ sis_memory_write ((mem + i) ^ EBT, &data[i], 1);
}
return length;
}
int
-sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
+sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length)
{
int i, len;
+ unsigned char *data = buffer;
for (i = 0; i < length; i++) {
- sis_memory_read ((mem + i) ^ EBT, &buf[i], 1);
+ sis_memory_read ((mem + i) ^ EBT, &data[i], 1);
}
return length;
}
}
int
-sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size)
+sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
{
int i;
+ const unsigned char *data = buffer;
init_pointers (sd);
if (addr < 0)
{
if (addr < memory_size)
{
- h8_set_memory (sd, addr + i, buffer[i]);
+ h8_set_memory (sd, addr + i, data[i]);
}
else
break;
}
int
-sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
+sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size)
{
init_pointers (sd);
if (addr < 0)
pc, read_map, CPU2DATA(addr + nr)) != 0)
nr++;
buf = NZALLOC (char, nr + 1);
- sim_read (CPU_STATE (current_cpu), CPU2DATA(addr), (unsigned char *) buf,
- nr);
+ sim_read (CPU_STATE (current_cpu), CPU2DATA(addr), buf, nr);
return buf;
}
case TARGET_NEWLIB_SYS_write:
buf = zalloc (PARM3);
- sim_read (CPU_STATE (current_cpu), CPU2DATA(PARM2),
- (unsigned char *) buf, PARM3);
+ sim_read (CPU_STATE (current_cpu), CPU2DATA(PARM2), buf, PARM3);
SET_H_GR (ret_reg,
sim_io_write (CPU_STATE (current_cpu),
PARM1, buf, PARM3));
}
int
-sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
+sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length)
{
check_desc (sd);
}
int
-sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
+sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length)
{
check_desc (sd);
(((loop >> 2) & RSVD_INSTRUCTION_ARG_MASK)
<< RSVD_INSTRUCTION_ARG_SHIFT));
H2T (insn);
- sim_write (sd, vaddr, (unsigned char *)&insn, sizeof (insn));
+ sim_write (sd, vaddr, &insn, sizeof (insn));
}
}
if (pmon_monitor_base != 0)
{
address_word vaddr = (pmon_monitor_base + (loop * 4));
- sim_write (sd, vaddr, (unsigned char *)&value, sizeof (value));
+ sim_write (sd, vaddr, &value, sizeof (value));
}
if (lsipmon_monitor_base != 0)
{
address_word vaddr = (lsipmon_monitor_base + (loop * 4));
- sim_write (sd, vaddr, (unsigned char *)&value, sizeof (value));
+ sim_write (sd, vaddr, &value, sizeof (value));
}
}
HALT_INSTRUCTION /* BREAK */ };
H2T (halt[0]);
H2T (halt[1]);
- sim_write (sd, 0x80000000, (unsigned char *) halt, sizeof (halt));
- sim_write (sd, 0x80000180, (unsigned char *) halt, sizeof (halt));
- sim_write (sd, 0x80000200, (unsigned char *) halt, sizeof (halt));
+ sim_write (sd, 0x80000000, halt, sizeof (halt));
+ sim_write (sd, 0x80000180, halt, sizeof (halt));
+ sim_write (sd, 0x80000200, halt, sizeof (halt));
/* XXX: Write here unconditionally? */
- sim_write (sd, 0xBFC00200, (unsigned char *) halt, sizeof (halt));
- sim_write (sd, 0xBFC00380, (unsigned char *) halt, sizeof (halt));
- sim_write (sd, 0xBFC00400, (unsigned char *) halt, sizeof (halt));
+ sim_write (sd, 0xBFC00200, halt, sizeof (halt));
+ sim_write (sd, 0xBFC00380, halt, sizeof (halt));
+ sim_write (sd, 0xBFC00400, halt, sizeof (halt));
}
}
while (sim_read (sd, addr + nr, &null, 1) == 1 && null != 0)
nr++;
buf = NZALLOC (char, nr + 1);
- sim_read (sd, addr, (unsigned char *)buf, nr);
+ sim_read (sd, addr, buf, nr);
return buf;
}
int nr = A2;
char *buf = zalloc (nr);
V0 = sim_io_read (sd, fd, buf, nr);
- sim_write (sd, A1, (unsigned char *)buf, nr);
+ sim_write (sd, A1, buf, nr);
free (buf);
}
break;
int fd = A0;
int nr = A2;
char *buf = zalloc (nr);
- sim_read (sd, A1, (unsigned char *)buf, nr);
+ sim_read (sd, A1, buf, nr);
V0 = sim_io_write (sd, fd, buf, nr);
if (fd == 1)
sim_io_flush_stdout (sd);
value = mem_size;
H2T (value);
- sim_write (sd, A0 + 0, (unsigned char *)&value, 4);
- sim_write (sd, A0 + 4, (unsigned char *)&zero, 4);
- sim_write (sd, A0 + 8, (unsigned char *)&zero, 4);
+ sim_write (sd, A0 + 0, &value, 4);
+ sim_write (sd, A0 + 4, &zero, 4);
+ sim_write (sd, A0 + 8, &zero, 4);
/* sim_io_eprintf (sd, "sim: get_mem_info() deprecated\n"); */
break;
}
int
-sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
+sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length)
{
int result = psim_read_memory(simulator, MAX_NR_PROCESSORS,
buf, mem, length);
int
-sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
+sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length)
{
int result = psim_write_memory(simulator, MAX_NR_PROCESSORS,
buf, mem, length,
cpu->sp = sp;
/* First push the argc value. */
- sim_write (sd, sp, (void *)&argc, sizeof (unsigned_word));
+ sim_write (sd, sp, &argc, sizeof (unsigned_word));
sp += sizeof (unsigned_word);
/* Then the actual argv strings so we know where to point argv[]. */
for (i = 0; i < argc; ++i)
{
unsigned len = strlen (argv[i]) + 1;
- sim_write (sd, sp_flat, (void *)argv[i], len);
- sim_write (sd, sp, (void *)&sp_flat, sizeof (address_word));
+ sim_write (sd, sp_flat, argv[i], len);
+ sim_write (sd, sp, &sp_flat, sizeof (address_word));
sp_flat += len;
sp += sizeof (address_word);
}
for (i = 0; i < envc; ++i)
{
unsigned len = strlen (env[i]) + 1;
- sim_write (sd, sp_flat, (void *)env[i], len);
- sim_write (sd, sp, (void *)&sp_flat, sizeof (address_word));
+ sim_write (sd, sp_flat, env[i], len);
+ sim_write (sd, sp, &sp_flat, sizeof (address_word));
sp_flat += len;
sp += sizeof (address_word);
}
/* Read memory. */
int
-sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
+sim_read (SIM_DESC sd, SIM_ADDR mem, void *buf, int length)
{
check_desc (sd);
/* Write memory. */
int
-sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
+sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buf, int length)
{
check_desc (sd);
}
int
-sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
+sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length)
{
int i;
+ unsigned char *data = buffer;
check_desc (sd);
{
bfd_vma addr = mem + i;
int do_swap = addr_in_swap_list (addr);
- buf[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
+ data[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
if (execution_error_get_last_error () != SIM_ERR_NONE)
return i;
}
int
-sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
+sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length)
{
int i;
+ const unsigned char *data = buffer;
check_desc (sd);
{
bfd_vma addr = mem + i;
int do_swap = addr_in_swap_list (addr);
- mem_put_qi (addr ^ (do_swap ? 3 : 0), buf[i]);
+ mem_put_qi (addr ^ (do_swap ? 3 : 0), data[i]);
if (execution_error_get_last_error () != SIM_ERR_NONE)
return i;
{
/* Include the termination byte. */
int i = strlen (prog_argv[regs[5]]) + 1;
- regs[0] = sim_write (0, regs[6], (void *) prog_argv[regs[5]], i);
+ regs[0] = sim_write (0, regs[6], prog_argv[regs[5]], i);
}
else
regs[0] = -1;
}
int
-sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size)
+sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
{
int i;
+ const unsigned char *data = buffer;
init_pointers ();
for (i = 0; i < size; i++)
{
- saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endianb] = buffer[i];
+ saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endianb] = data[i];
}
return size;
}
int
-sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
+sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size)
{
int i;
+ unsigned char *data = buffer;
init_pointers ();
for (i = 0; i < size; i++)
{
- buffer[i] = saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endianb];
+ data[i] = saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endianb];
}
return size;
}
nr++;
buf = NZALLOC (char, nr + 1);
- sim_read (simulator, addr, (unsigned char *) buf, nr);
+ sim_read (simulator, addr, buf, nr);
return buf;
}
{
char *buf = zalloc (PARM3);
RETVAL = sim_io_read (simulator, PARM1, buf, PARM3);
- sim_write (simulator, PARM2, (unsigned char *) buf, PARM3);
+ sim_write (simulator, PARM2, buf, PARM3);
free (buf);
if ((int) RETVAL < 0)
RETERR = sim_io_get_errno (simulator);
case TARGET_NEWLIB_V850_SYS_write:
{
char *buf = zalloc (PARM3);
- sim_read (simulator, PARM2, (unsigned char *) buf, PARM3);
+ sim_read (simulator, PARM2, buf, PARM3);
if (PARM1 == 1)
RETVAL = sim_io_write_stdout (simulator, buf, PARM3);
else