opcodes/arc: Support dmb instruction with no operands
authorAndrew Burgess <andrew.burgess@embecosm.com>
Wed, 16 Dec 2015 13:57:44 +0000 (13:57 +0000)
committerAndrew Burgess <andrew.burgess@embecosm.com>
Thu, 31 Dec 2015 21:55:45 +0000 (21:55 +0000)
In this GCC commit:
  https://gcc.gnu.org/ml/gcc-patches/2015-12/msg00735.html
GCC started emitting dmb instructions with no operands.  The intention
was that dmb with no operands should be an alias for 'dmb 0'.

The following patch extends the arc opcodes library to support dmb with
no operands.

opcodes/ChangeLog:

* arc-tbl.h (dmb): Add a no operand version of dmb.

opcodes/ChangeLog
opcodes/arc-tbl.h

index 63ad12b4c486d58364f7f2c27c42f0b717c4887e..e5f1202832d941fc041d3812e87faa854561c143 100644 (file)
@@ -1,3 +1,8 @@
+2015-12-31  Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
+           Andrew Burgess <andrew.burgess@embecosm.com>
+
+       * arc-tbl.h (dmb): Add a no operand version of dmb.
+
 2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
        * arm-dis.c (arm_opcodes): Guard movw, movt cbz, cbnz, clrex, ldrex,
index 1b4715d1b9e97eeb1c18eba71a2d805844c1c8f7..9aeda7f9eb5f263f6730284ca072ff1b4efd6076 100644 (file)
 /* dmb u3 00100011011011110001RRRuuu111111.  */
 { "dmb", 0x236F103F, 0xFFFFF03F, ARC_OPCODE_ARCv2HS, CONTROL, NONE, { UIMM3_23 }, { 0 }},
 
+/* dmb    00100011011011110001RRR000111111.  */
+{ "dmb", 0x236F103F, 0xFFFFFFFF, ARC_OPCODE_ARCv2HS, CONTROL, NONE, { 0 }, { 0 }},
+
 /* dmpyh<.f> a,b,c 00101bbb00010000FBBBCCCCCCAAAAAA.  */
 { "dmpyh", 0x28100000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, MPY7E, { RA, RB, RC }, { C_F }},