* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
+ * Copyright (c) 2007-2008 The Florida State University
+ * All rights reserved.
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Andreas Sandberg
+ * Stephen Hines
*/
#include "arch/arm/insts/pseudo.hh"
{
return csprintf("gem5fault %s", faultName());
}
+
+
+
+FailUnimplemented::FailUnimplemented(const char *_mnemonic,
+ ExtMachInst _machInst)
+ : ArmStaticInst(_mnemonic, _machInst, No_OpClass)
+{
+ // don't call execute() (which panics) if we're on a
+ // speculative path
+ flags[IsNonSpeculative] = true;
+}
+
+FailUnimplemented::FailUnimplemented(const char *_mnemonic,
+ ExtMachInst _machInst,
+ const std::string& _fullMnemonic)
+ : ArmStaticInst(_mnemonic, _machInst, No_OpClass),
+ fullMnemonic(_fullMnemonic)
+{
+ // don't call execute() (which panics) if we're on a
+ // speculative path
+ flags[IsNonSpeculative] = true;
+}
+
+Fault
+FailUnimplemented::execute(ExecContext *xc, Trace::InstRecord *traceData) const
+{
+ return std::make_shared<UndefinedInstruction>(machInst, false, mnemonic);
+}
+
+std::string
+FailUnimplemented::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+ return csprintf("%-10s (unimplemented)",
+ fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
+}
+
+
+
+WarnUnimplemented::WarnUnimplemented(const char *_mnemonic,
+ ExtMachInst _machInst)
+ : ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false)
+{
+ // don't call execute() (which panics) if we're on a
+ // speculative path
+ flags[IsNonSpeculative] = true;
+}
+
+WarnUnimplemented::WarnUnimplemented(const char *_mnemonic,
+ ExtMachInst _machInst,
+ const std::string& _fullMnemonic)
+ : ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false),
+ fullMnemonic(_fullMnemonic)
+{
+ // don't call execute() (which panics) if we're on a
+ // speculative path
+ flags[IsNonSpeculative] = true;
+}
+
+Fault
+WarnUnimplemented::execute(ExecContext *xc, Trace::InstRecord *traceData) const
+{
+ if (!warned) {
+ warn("\tinstruction '%s' unimplemented\n",
+ fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
+ warned = true;
+ }
+
+ return NoFault;
+}
+
+std::string
+WarnUnimplemented::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+ return csprintf("%-10s (unimplemented)",
+ fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
+}
+
+
+
+FlushPipeInst::FlushPipeInst(const char *_mnemonic, ExtMachInst _machInst)
+ : ArmStaticInst(_mnemonic, _machInst, No_OpClass)
+{
+ flags[IsNonSpeculative] = true;
+}
+
+Fault
+FlushPipeInst::execute(ExecContext *xc, Trace::InstRecord *traceData) const
+{
+ Fault fault = std::make_shared<FlushPipe>();
+ return fault;
+}
+
+std::string
+FlushPipeInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+ return csprintf("%-10s (pipe flush)", mnemonic);
+}
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
+ * Copyright (c) 2007-2008 The Florida State University
+ * All rights reserved.
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Andreas Sandberg
+ * Stephen Hines
*/
#ifndef __ARCH_ARM_INSTS_PSEUDO_HH__
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
+/**
+ * Static instruction class for unimplemented instructions that
+ * cause simulator termination. Note that these are recognized
+ * (legal) instructions that the simulator does not support; the
+ * 'Unknown' class is used for unrecognized/illegal instructions.
+ * This is a leaf class.
+ */
+class FailUnimplemented : public ArmStaticInst
+{
+ private:
+ /// Full mnemonic for MRC and MCR instructions including the
+ /// coproc. register name
+ std::string fullMnemonic;
+
+ public:
+ FailUnimplemented(const char *_mnemonic, ExtMachInst _machInst);
+ FailUnimplemented(const char *_mnemonic, ExtMachInst _machInst,
+ const std::string& _fullMnemonic);
+
+ Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const;
+
+ std::string
+ generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+};
+
+/**
+ * Base class for unimplemented instructions that cause a warning
+ * to be printed (but do not terminate simulation). This
+ * implementation is a little screwy in that it will print a
+ * warning for each instance of a particular unimplemented machine
+ * instruction, not just for each unimplemented opcode. Should
+ * probably make the 'warned' flag a static member of the derived
+ * class.
+ */
+class WarnUnimplemented : public ArmStaticInst
+{
+ private:
+ /// Have we warned on this instruction yet?
+ mutable bool warned;
+ /// Full mnemonic for MRC and MCR instructions including the
+ /// coproc. register name
+ std::string fullMnemonic;
+
+ public:
+ WarnUnimplemented(const char *_mnemonic, ExtMachInst _machInst);
+ WarnUnimplemented(const char *_mnemonic, ExtMachInst _machInst,
+ const std::string& _fullMnemonic);
+
+ Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const;
+
+ std::string
+ generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+};
+
+class FlushPipeInst : public ArmStaticInst
+{
+ public:
+ FlushPipeInst(const char *_mnemonic, ExtMachInst _machInst);
+
+ Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const;
+
+ std::string
+ generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+
+};
+
#endif
//Miscellaneous instructions that don't fit elsewhere
##include "misc.isa"
-//Include the unimplemented format
-##include "unimp.isa"
-
-//Include the unknown format
-##include "unknown.isa"
-
//Include the breakpoint format
##include "breakpoint.isa"
// unmodified and in its entirety in all distributions of the software,
// modified or unmodified, in source code or in binary form.
//
+// Copyright (c) 2007-2008 The Florida State University
+// All rights reserved.
+//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Andreas Sandberg
+// Stephen Hines
+
+
+////////////////////////////////////////////////////////////////////
+//
+// Internal fault handling
+//
def format DecoderFault() {{
decode_block = '''
return new DecoderFaultInst(machInst);
'''
}};
+
+////////////////////////////////////////////////////////////////////
+//
+// Unknown instruction handling
+//
+
+def format Unknown() {{
+ decode_block = 'return new Unknown(machInst);\n'
+}};
+
+////////////////////////////////////////////////////////////////////
+//
+// Unimplemented instructions
+//
+
+def format FailUnimpl() {{
+ iop = InstObjParams(name, 'FailUnimplemented')
+ decode_block = BasicDecodeWithMnemonic.subst(iop)
+}};
+
+def format WarnUnimpl() {{
+ iop = InstObjParams(name, 'WarnUnimplemented')
+ decode_block = BasicDecodeWithMnemonic.subst(iop)
+}};
+++ /dev/null
-// -*- mode:c++ -*-
-
-// Copyright (c) 2010, 2012 ARM Limited
-// All rights reserved
-//
-// The license below extends only to copyright in the software and shall
-// not be construed as granting a license to any other intellectual
-// property including but not limited to intellectual property relating
-// to a hardware implementation of the functionality of the software
-// licensed hereunder. You may use the software subject to the license
-// terms below provided that you ensure that this notice is replicated
-// unmodified and in its entirety in all distributions of the software,
-// modified or unmodified, in source code or in binary form.
-//
-// Copyright (c) 2007-2008 The Florida State University
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are
-// met: redistributions of source code must retain the above copyright
-// notice, this list of conditions and the following disclaimer;
-// redistributions in binary form must reproduce the above copyright
-// notice, this list of conditions and the following disclaimer in the
-// documentation and/or other materials provided with the distribution;
-// neither the name of the copyright holders nor the names of its
-// contributors may be used to endorse or promote products derived from
-// this software without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Authors: Stephen Hines
-
-////////////////////////////////////////////////////////////////////
-//
-// Unimplemented instructions
-//
-
-output header {{
- /**
- * Static instruction class for unimplemented instructions that
- * cause simulator termination. Note that these are recognized
- * (legal) instructions that the simulator does not support; the
- * 'Unknown' class is used for unrecognized/illegal instructions.
- * This is a leaf class.
- */
- class FailUnimplemented : public ArmStaticInst
- {
- public:
- /// Full mnemonic for MRC and MCR instructions including the
- /// coproc. register name
- std::string fullMnemonic;
-
- /// Constructor
- FailUnimplemented(const char *_mnemonic, ExtMachInst _machInst)
- : ArmStaticInst(_mnemonic, _machInst, No_OpClass)
- {
- // don't call execute() (which panics) if we're on a
- // speculative path
- flags[IsNonSpeculative] = true;
- }
-
- FailUnimplemented(const char *_mnemonic, ExtMachInst _machInst,
- const std::string& _fullMnemonic)
- : ArmStaticInst(_mnemonic, _machInst, No_OpClass),
- fullMnemonic(_fullMnemonic)
- {
- // don't call execute() (which panics) if we're on a
- // speculative path
- flags[IsNonSpeculative] = true;
- }
-
- %(BasicExecDeclare)s
-
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
- };
-
- /**
- * Base class for unimplemented instructions that cause a warning
- * to be printed (but do not terminate simulation). This
- * implementation is a little screwy in that it will print a
- * warning for each instance of a particular unimplemented machine
- * instruction, not just for each unimplemented opcode. Should
- * probably make the 'warned' flag a static member of the derived
- * class.
- */
- class WarnUnimplemented : public ArmStaticInst
- {
- private:
- /// Have we warned on this instruction yet?
- mutable bool warned;
- /// Full mnemonic for MRC and MCR instructions including the
- /// coproc. register name
- std::string fullMnemonic;
-
- public:
- /// Constructor
- WarnUnimplemented(const char *_mnemonic, ExtMachInst _machInst)
- : ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false)
- {
- // don't call execute() (which panics) if we're on a
- // speculative path
- flags[IsNonSpeculative] = true;
- }
-
- WarnUnimplemented(const char *_mnemonic, ExtMachInst _machInst,
- const std::string& _fullMnemonic)
- : ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false),
- fullMnemonic(_fullMnemonic)
- {
- // don't call execute() (which panics) if we're on a
- // speculative path
- flags[IsNonSpeculative] = true;
- }
-
- %(BasicExecDeclare)s
-
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
- };
-
- class FlushPipeInst : public ArmStaticInst
- {
- public:
- FlushPipeInst(const char *_mnemonic, ExtMachInst _machInst)
- : ArmStaticInst(_mnemonic, _machInst, No_OpClass)
- {
- flags[IsNonSpeculative] = true;
- }
-
- %(BasicExecDeclare)s
-
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
-
- };
-}};
-
-output decoder {{
- std::string
- FailUnimplemented::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- return csprintf("%-10s (unimplemented)",
- fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
- }
-
- std::string
- WarnUnimplemented::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- return csprintf("%-10s (unimplemented)",
- fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
- }
-
- std::string
- FlushPipeInst::generateDisassembly(Addr pc,
- const SymbolTable *symtab) const
- {
- return csprintf("%-10s (pipe flush)", mnemonic);
- }
-}};
-
-output exec {{
- Fault
- FailUnimplemented::execute(CPU_EXEC_CONTEXT *xc,
- Trace::InstRecord *traceData) const
- {
- return std::make_shared<UndefinedInstruction>(machInst, false,
- mnemonic);
- }
-
- Fault
- WarnUnimplemented::execute(CPU_EXEC_CONTEXT *xc,
- Trace::InstRecord *traceData) const
- {
- if (!warned) {
- warn("\tinstruction '%s' unimplemented\n",
- fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
- warned = true;
- }
-
- return NoFault;
- }
-
- Fault
- FlushPipeInst::execute(CPU_EXEC_CONTEXT *xc,
- Trace::InstRecord *traceData) const
- {
- Fault fault = std::make_shared<FlushPipe>();
- return fault;
- }
-}};
-
-
-def format FailUnimpl() {{
- iop = InstObjParams(name, 'FailUnimplemented')
- decode_block = BasicDecodeWithMnemonic.subst(iop)
-}};
-
-def format WarnUnimpl() {{
- iop = InstObjParams(name, 'WarnUnimplemented')
- decode_block = BasicDecodeWithMnemonic.subst(iop)
-}};
-
+++ /dev/null
-// -*- mode:c++ -*-
-
-// Copyright (c) 2010 ARM Limited
-// All rights reserved
-//
-// The license below extends only to copyright in the software and shall
-// not be construed as granting a license to any other intellectual
-// property including but not limited to intellectual property relating
-// to a hardware implementation of the functionality of the software
-// licensed hereunder. You may use the software subject to the license
-// terms below provided that you ensure that this notice is replicated
-// unmodified and in its entirety in all distributions of the software,
-// modified or unmodified, in source code or in binary form.
-//
-// Copyright (c) 2007-2008 The Florida State University
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are
-// met: redistributions of source code must retain the above copyright
-// notice, this list of conditions and the following disclaimer;
-// redistributions in binary form must reproduce the above copyright
-// notice, this list of conditions and the following disclaimer in the
-// documentation and/or other materials provided with the distribution;
-// neither the name of the copyright holders nor the names of its
-// contributors may be used to endorse or promote products derived from
-// this software without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Authors: Stephen Hines
-
-def format Unknown() {{
- decode_block = 'return new Unknown(machInst);\n'
-}};
-
projects / gem5.git / commitdiff