[AArch64] Set ctz rtx_cost (PR93565)

Combine sometimes behaves oddly and duplicates ctz to remove an unnecessary
sign extension.  Avoid this by setting the cost for ctz to be higher than
that of a simple ALU instruction.  Deepsjeng performance improves by ~0.6%.

gcc/
	PR rtl-optimization/93565
	* config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.

testsuite/
	PR rtl-optimization/93565
	* gcc.target/aarch64/pr93565.c: New test.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 36e75b35fb895f9f1b8f3045dc5fe1e700c33c3d..735cc47a3dd5cc0284159b532ec9cbeb49a874d8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2020-02-12  Wilco Dijkstra  <wdijkstr@arm.com>
+
+       PR rtl-optimization/93565
+       * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
+
 2020-02-12  Wilco Dijkstra  <wdijkstr@arm.com>
 
        * config/aarch64/aarch64-simd.md

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 6a1b4099af125d44a5c9d9437a8f05cd58d7fa88..4a34dce5d7963ae00c77aa623c7911363a0c2acd 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -11507,6 +11507,13 @@ aarch64_rtx_costs (rtx x, machine_mode mode, int outer ATTRIBUTE_UNUSED,
 
       return false;
 
+    case CTZ:
+      *cost = COSTS_N_INSNS (2);
+
+      if (speed)
+       *cost += extra_cost->alu.clz + extra_cost->alu.rev;
+      return false;
+
     case COMPARE:
       op0 = XEXP (x, 0);
       op1 = XEXP (x, 1);

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 18d643485d6449c4e264fb8848eb1f4ce1742829..1153c742ceb58f1656c9f5faa892a40cc92008a3 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-02-12  Wilco Dijkstra  <wdijkstr@arm.com>
+
+       PR rtl-optimization/93565
+       * gcc.target/aarch64/pr93565.c: New test.
+
 2020-02-12  Wilco Dijkstra  <wdijkstr@arm.com>
 
        * gcc.target/aarch64/popcnt2.c: New test.

diff --git a/gcc/testsuite/gcc.target/aarch64/pr93565.c b/gcc/testsuite/gcc.target/aarch64/pr93565.c
new file mode 100644 (file)
index 0000000..7200f80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr93565.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+static const unsigned long long magic = 0x03f08c5392f756cdULL;
+
+static const char table[64] = {
+     0,  1, 12,  2, 13, 22, 17,  3,
+    14, 33, 23, 36, 18, 58, 28,  4,
+    62, 15, 34, 26, 24, 48, 50, 37,
+    19, 55, 59, 52, 29, 44, 39,  5,
+    63, 11, 21, 16, 32, 35, 57, 27,
+    61, 25, 47, 49, 54, 51, 43, 38,
+    10, 20, 31, 56, 60, 46, 53, 42,
+     9, 30, 45, 41,  8, 40,  7,  6,
+};
+
+static inline int ctz1 (unsigned long  b)
+{
+  unsigned long lsb = b & -b;
+  return table[(lsb * magic) >> 58];
+}
+
+void f (unsigned long x, int *p)
+{
+  if (x != 0)
+    {
+      int a = ctz1 (x);
+      *p = a | p[a];
+    }
+}
+
+/* { dg-final { scan-assembler-times "rbit\t" 1 } } */
+/* { dg-final { scan-assembler-times "clz\t" 1 } } */
+