Added found_real feature to AstNode::detectSignWidth

diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h
index 74a476b5ebffe72a6d26092fe7adcaa18fc9de87..f89af633e8130d300df4ad85dbf84f608dbabbc9 100644 (file)
--- a/frontends/ast/ast.h
+++ b/frontends/ast/ast.h
@@ -214,8 +214,8 @@ namespace AST
                void dumpVlog(FILE *f, std::string indent);
 
                // used by genRTLIL() for detecting expression width and sign
-               void detectSignWidthWorker(int &width_hint, bool &sign_hint);
-               void detectSignWidth(int &width_hint, bool &sign_hint);
+               void detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *found_real = NULL);
+               void detectSignWidth(int &width_hint, bool &sign_hint, bool *found_real = NULL);
 
                // create RTLIL code for this AST node
                // for expressions the resulting signal vector is returned

diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index 8a57a0ee7967bd2141a1d78f53408c73414d7ff2..1f0ef4450019fbcf8edd55d8e741f60b9396e586 100644 (file)
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -585,7 +585,7 @@ struct AST_INTERNAL::ProcessGenerator
 };
 
 // detect sign and width of an expression
-void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint)
+void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *found_real)
 {
        std::string type_name;
        bool sub_sign_hint = true;
@@ -603,6 +603,8 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint)
                break;
 
        case AST_REALVALUE:
+               if (found_real)
+                       *found_real = true;
                width_hint = std::max(width_hint, 32);
                break;
 
@@ -788,10 +790,13 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint)
 }
 
 // detect sign and width of an expression
-void AstNode::detectSignWidth(int &width_hint, bool &sign_hint)
+void AstNode::detectSignWidth(int &width_hint, bool &sign_hint, bool *found_real)
 {
-       width_hint = -1, sign_hint = true;
-       detectSignWidthWorker(width_hint, sign_hint);
+       width_hint = -1;
+       sign_hint = true;
+       if (found_real)
+               *found_real = false;
+       detectSignWidthWorker(width_hint, sign_hint, found_real);
 }
 
 // create RTLIL from an AST node