re PR middle-end/48908 (build fails on cris-elf in libiberty:md5.c, shift-related)

2011-05-08  Richard Guenther  <rguenther@suse.de>

	PR middle-end/48908
	PR middle-end/48905
	* expmed.c (expand_shift_1): Compute adjusted constant shift
	amount manually.

From-SVN: r173550

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c1a359d61d5d73cc772636ea8305dc6bd85ba7e5..5842b6ab758ee1a41a20ee15d42dc749846574ef 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2011-05-08  Richard Guenther  <rguenther@suse.de>
+
+       PR middle-end/48908
+       PR middle-end/48905
+       * expmed.c (expand_shift_1): Compute adjusted constant shift
+       amount manually.
+
 2011-05-08  Eric Botcazou  <ebotcazou@adacore.com>
 
        * config/avr/avr.c (print_operand_address): Fix invalid RTL access.

diff --git a/gcc/expmed.c b/gcc/expmed.c
index 4e1ea3a2b0a07978068d450f62c5061495b8bfc4..18a65929f78c17e337b82f80b700dc2cd4499104 100644 (file)
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -2142,10 +2142,14 @@ expand_shift_1 (enum tree_code code, enum machine_mode mode, rtx shifted,
              rtx temp1;
 
              new_amount = op1;
-             other_amount
-               = simplify_gen_binary (MINUS, GET_MODE (op1),
-                                      GEN_INT (GET_MODE_BITSIZE (mode)),
-                                      op1);
+             if (CONST_INT_P (op1))
+               other_amount = GEN_INT (GET_MODE_BITSIZE (mode)
+                                       - INTVAL (op1));
+             else
+               other_amount
+                 = simplify_gen_binary (MINUS, GET_MODE (op1),
+                                        GEN_INT (GET_MODE_BITSIZE (mode)),
+                                        op1);
 
              shifted = force_reg (mode, shifted);